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參數(shù)資料
| 型號： | AD5405YCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 24/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC DUAL 12BIT MULT 40LFCSP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 2,500 |
| 設置時間： | 80ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 50µW |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電流，單極；4 電流，雙極 |
| 采樣率（每秒）： | 21.3M |
| 配用： | EVAL-AD5405EB-ND - BOARD EVAL FOR AD5405 |
AD5405
Rev. B | Page 7 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
AD5405
TOP VIEW
(Not to Scale)
1
R1A
2
R2A
3
R2_3A
4
R3A
5
VREFA
6
DGND
7
LDAC
8
DAC A/B
9
NC
10
DB11
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD MUST BE CONNECTED TO GROUND.
DB
1
0
1
D
B
9
12
D
B
8
13
D
B
7
14
D
B
6
15
DB5
1
6
D
B
4
17
DB3
18
D
B
2
19
D
B
1
20
30 R1B
29 R2B
28 R2_3B
27 R3B
26 VREFB
25 VDD
24 CLR
23 R/W
22 CS
21 DB0
40
R
FB
A
39
I
OU
T
2
A
38
I
OU
T
1A
37
N
C
36
N
C
35
N
C
34
N
C
33
I
OU
T
1
B
32
I
OU
T
2
B
31
R
FB
B
04
463
-00
4
Figure 4. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1 to 4
R1A, R2B,
R2_3B, R3A
DAC A 4-Quadrant Resistors. Allow a number of configuration modes, including bipolar operation with
minimum of external components.
5, 26
VREFA, VREFB
DAC Reference Voltage Input Terminals.
6
DGND
Digital Ground Pin.
7
LDAC
Load DAC Input. Allows asynchronous or synchronous updates to the DAC output. The DAC is
asynchronously updated when this signal goes low. Alternatively, if this line is held permanently low, an
automatic or synchronous update mode is selected whereby the DAC is updated on the rising edge of CS.
8
DAC A/B
Selects DAC A or B. Low selects DAC A, and high selects DAC B.
9, 34 to 37
NC
Not internally connected.
10 to 21
DB11 to DB0
Parallel Data Bits 11 through 0.
22
CS
Chip Select Input. Active low. Used in conjunction with R/W to load parallel data to the input latch or to
read data from the DAC register. Edge sensitive; when pulled high, the DAC data is latched.
23
R/W
Read/Write. When low, used in conjunction with CS to load parallel data. When high, used in conjunction
with CS to read back contents of DAC register.
24
CLR
Active Low Control Input. Clears DAC output and input and DAC registers.
25
VDD
Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V.
27 to 30
R3B, R2_3B,
R2B, R1B
DAC B 4-Quadrant Resistors. Allow a number of configuration modes, including bipolar operation with a
minimum of external components.
31, 40
RFBB, RFBA
External Amplifier Output.
32
IOUT2B
DAC A Analog Ground. This pin typically should be tied to the analog ground of the system, but can be
biased to achieve single-supply operation.
33
IOUT1B
DAC B Current Outputs.
38
IOUT1A
DAC A Current Outputs.
39
IOUT2A
DAC A Analog Ground. This pin typically should be tied to the analog ground of the system, but can be
biased to achieve single-supply operation.
EPAD
Exposed pad must be connected to ground.
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| AD5405YCPZ-REEL7 | 功能描述:IC DAC DUAL 12BIT MULT 40LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標準包裝:91 系列:- 設置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應商設備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD540J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| AD540JH | 制造商:AD84/07 功能描述:Operational Amplifier, Single AMP, Bipolar/JFET, 8 Pin, Metal Can |
| AD540K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| AD540S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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