參數(shù)資料
型號: AD538SD
廠商: Analog Devices Inc
文件頁數(shù): 9/17頁
文件大?。?/td> 0K
描述: IC MULT/DIV REALTIME ACU 18-CDIP
標準包裝: 1
功能: 模擬計算裝置
位元/級數(shù): 單象限
封裝/外殼: 18-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 18-CDIP
包裝: 管件
AD538
Rev. E | Page 16 of 16
OUTLINE DIMENSIONS
18
1
9
10
0.310 (7.87)
0.220 (5.59)
PIN 1
0.098 (2.49) MAX
0.005 (0.13) MIN
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.070 (1.78)
0.030 (0.76)
0.960 (24.38) MAX
0.100
(2.54)
BSC
0.150
(3.81)
MIN
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 19. 18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
(D-18)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Temperature Range
Package Description
Package Option
AD538ACHIPS
25°C to +85°C
Chips
AD538AD
25°C to +85°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD538ADZ
25°C to +85°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD538BD
25°C to +85°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD538BDZ
25°C to +85°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD538SD
55°C to +125°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
AD538SD/883B
55°C to +125°C
18-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
D-18
1 Z = RoHS Compliant Part.
2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00959-0-6/11(E)
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