I2C Serial Interface DV
參數(shù)資料
型號(hào): AD5384BBCZ-5
廠商: Analog Devices Inc
文件頁(yè)數(shù): 32/32頁(yè)
文件大小: 0K
描述: IC DAC 14BIT 40CH 5V 100-CSPBGA
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5384 Models Discontinuation 15/May/2012
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 8µs
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 40
電壓電源: 單電源
功率耗散(最大): 80mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 100-CSBGA(10x10)
包裝: 托盤
輸出數(shù)目和類型: 40 電壓,單極
采樣率(每秒): 125k
Data Sheet
AD5384
I2C Serial Interface
DVDDx = 2.7 V to 5.5 V; AVDDx = 4.5 V to 5.5 V; AGNDx = DGND = 0 V; all specifications TMIN to TMAX, unless otherwise noted.
See Figure 6. Limit at TMIN, TMAX.
Table 4.
Parameter
Min
Typ
Max
Unit
Description
fSCL
400
kHz
SCL clock frequency
t1
2.5
s
SCL cycle time
t2
0.6
s
SCL high time, tHIGH
t3
1.3
s
SCL low time, tLOW
t4
0.6
s
Start/repeated start condition hold time, tHD, STA
t5
100
ns
Data setup time, tSU,DAT
t61
0.9
s
Data hold time, tHD,DAT
0
s
Data hold time, tHD,DAT
t7
0.6
s
Setup time for repeated start, tSU,STA
t8
0.6
s
Stop condition setup time, tSU, STO
t9
1.3
s
Bus free time between a stop and a start condition, tBUF
t10
300
ns
Rise time of SCL and SDA when receiving, tR
0
ns
Rise time of SCL and SDA when receiving (CMOS-compatible), tR
t11
300
ns
Fall time of SDA when transmitting, tF
0
ns
Fall time of SDA when receiving (CMOS-compatible), tF
300
ns
Fall time of SCL and SDA when receiving, tF
20 + 0.1Cb2
ns
Fall time of SCL and SDA when transmitting, tF
Cb
400
pF
Capacitive load for each bus line
1
A master device must provide a hold time of at least 300 ns for the SDA signal (referred to the VIH min of the SCL signal) in order to bridge the undefined region of the
SCL falling edge.
2
Cb is the total capacitance, in pF, of one bus line. tR and tF are measured between 0.3 DVDDx and 0.7 DVDDx.
START
CONDITION
REPEATED
START
CONDITION
STOP
CONDITION
t9
t3
t1
t11
t4
t10
t4
t5
t7
t6
t8
t2
SDA
SCL
04652-
007
Figure 6. I2C-Compatible Serial Interface Timing Diagram
Rev. B | Page 9 of 32
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