VREF(V) E RROR (LS B ) 0.5 0.3 0.2 0" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AD5347BRU
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 5/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DAC 10BIT OCTAL VOUT 38-TSSOP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Data Converter Fundamentals
DAC Architectures
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
瑷�(sh猫)缃檪(sh铆)闁擄細 7µs
浣嶆暩(sh霉)锛� 10
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 骞惰伅(li谩n)
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 8
闆诲闆绘簮锛� 鍠浕婧�
鍔熺巼鑰楁暎锛堟渶澶э級锛� 8.3mW
宸ヤ綔婧害锛� -40°C ~ 105°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 38-TFSOP锛�0.173"锛�4.40mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 38-TSSOP
鍖呰锛� 绠′欢
杓稿嚭鏁�(sh霉)鐩拰椤炲瀷锛� 8 闆诲锛屽柈妤碉紱8 闆诲锛岄洐妤�
閲囨ǎ鐜囷紙姣忕锛夛細 143k
AD5346/AD5347/AD5348
Rev. 0 | Page 13 of 24
VREF(V)
E
RROR
(LS
B
)
0.5
0.3
0.2
0.1
0.4
鈥�0.5
鈥�0.4
0
鈥�0.3
鈥�0.2
鈥�0.1
01
2
3
4
5
MAX INL
MAX DNL
MIN INL
MIN DNL
03331-0-031
VDD = 5V
TA = 25掳C
Figure 20. AD5346 INL and DNL Error vs. VREF
TEMPERATURE (
掳C)
E
RROR
(LS
B
)
0.5
0.2
鈥�0.5
鈥�40
0
鈥�2040
20
0
鈥�0.2
60
80
100
鈥�0.4
鈥�0.3
鈥�0.1
0.1
0.3
0.4
MAX INL
MAX DNL
MIN INL
03331-0-032
VDD = 5V
VREF = 2V
MIN DNL
Figure 21. AD5346 INL and DNL Error vs. Temperature
TEMPERATURE (
掳C)
鈥�1.0
03331-0-033
E
RROR
(%
FS
R)
1.0
0.5
鈥�40
鈥�20
0
40
20
0
鈥�0.5
80
60
100
OFFSET ERROR
GAIN ERROR
VDD = 5V
VREF = 2V
Figure 22. AD5346 Offset Error and Gain Error vs. Temperature
VDD (V)
E
RROR
(%
FS
R)
0.2
0
鈥�0.6
0
2
1
3
鈥�0.4
鈥�0.2
45
6
鈥�0.5
鈥�0.3
鈥�0.1
0.1
03331-0-034
TA = 25掳C
VREF = 2V
OFFSET ERROR
GAIN ERROR
Figure 23. Offset Error and Gain Error vs. VDD
SINK/SOURCE CURRENT (mA)
V
OUT
(V
)
5
0
2
1
3
45
6
1
2
4
03331-0-035
5V SOURCE
3V SOURCE
5V SINK
3V SINK
Figure 24. VOUT Source and Sink Current Capability
DAC CODE
I DD
(mA)
1.0
0.8
0
ZERO SCALE
HALF SCALE
0.2
0.4
FULL SCALE
0.1
0.3
0.5
0.6
0.7
0.9
03331-0-036
VDD = 5V
TA = 25掳C
Figure 25. Supply Current vs. DAC Code
鐩搁棞(gu膩n)PDF璩囨枡
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