參數(shù)資料
型號: AD5321BRMZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 11/24頁
文件大?。?/td> 0K
描述: IC DAC 12BIT 2WIRE I2C 8-MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時間: 8µs
位數(shù): 12
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.4mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 125k
AD5301/AD5311/AD5321
Rev. B | Page 19 of 24
POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The AD5301/AD5311/AD5321
should be decoupled to GND with 10 μF in parallel with a
0.1 μF capacitor, located as close to the package as possible.
The 10 μF capacitor should be the tantalum bead type, while
a ceramic 0.1 μF capacitor provides a sufficient low impedance
path to ground at high frequencies. The power supply lines of
the AD5301/AD5311/AD5321 should use as large a trace as
possible to provide low impedance paths. A ground line routed
between the SDA and SCL lines helps reduce crosstalk between
them. This is not required on a multilayer board as there is a
ground plane layer, but separating the lines helps.
AD5301
A1
A0
VOUT
AD5301
A1
A0
AD5301
A1
A0
AD5301
A1
A0
SCL
SDA
SCL
SDA
SCL
SDA
SCL
SDA
5V
MASTER
RP
VOUT
VDD
00
92
7-
0
36
Figure 38. Multiple AD5301 Devices on One Bus
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