VDD = 2.5 V to 5.5 V, V
參數(shù)資料
型號: AD5305BRMZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 18/24頁
文件大?。?/td> 0K
描述: IC DAC 8BIT 2WIRE I2C 10-MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1,000
設(shè)置時間: 6µs
位數(shù): 8
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 167k
AD5305/AD5315/AD5325
Rev. G | Page 3 of 24
SPECIFICATIONS
VDD = 2.5 V to 5.5 V, VREF = 2 V, RL = 2 kΩ to GND, CL = 200 pF to GND, all specifications TMIN to TMAX, unless otherwise noted.
Table 1.
A Version1
B Version1
Parameter2
Min
Typ
Max
Min
Typ
Max
Unit
Conditions/Comments
DC PERFORMANCE3, 4
AD5305
Resolution
8
Bits
Relative Accuracy
±0.15
±1
±0.15
±0.625
LSB
Differential Nonlinearity
±0.02
±0.25
±0.02
±0.25
LSB
Guaranteed monotonic by design
over all codes
AD5315
Resolution
10
Bits
Relative Accuracy
±0.5
±4
±0.5
±2.5
LSB
Differential Nonlinearity
±0.05
±0.5
±0.05
±0.5
LSB
Guaranteed monotonic by design
over all codes
AD5325
Resolution
12
Bits
Relative Accuracy
±2
±16
±2
±10
LSB
Differential Nonlinearity
±0.2
±1
±0.2
±1
LSB
Guaranteed monotonic by design
over all codes
Offset Error
±0.4
±3
±0.4
±3
% of FSR
Gain Error
±0.15
±1
±0.15
±1
% of FSR
Lower Deadband
20
60
20
60
mV
Lower deadband exists only if offset
error is negative
Offset Error Drift5
12
ppm of
FSR/°C
Gain Error Drift5
5
ppm of
FSR/°C
Power Supply Rejection Ratio5
–60
dB
VDD = ±10%
DC Crosstalk5
200
μV
RL = 2 kΩ to GND or VDD
DAC REFERENCE INPUTS5
VREF Input Range
0.25
VDD
0.25
VDD
V
VREF Input Impedance
37
45
37
45
Normal operation
>10
Power-down mode
Reference Feedthrough
90
dB
Frequency = 10 kHz
OUTPUT CHARACTERISTICS5
Minimum Output Voltage6
0.001
V
A measure of the minimum and
maximum drive capability of the
output amplifier
Maximum Output Voltage6
VDD
0.001
VDD
0.001
V
DC Output Impedance
0.5
Ω
Short-Circuit Current
25
mA
VDD = 5 V
16
mA
VDD = 3 V
Power-Up Time
2.5
μs
Coming out of power-down mode
VDD = 5 V
5
μs
Coming out of power-down mode
VDD = 3 V
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