
Data Sheet
AD5304/AD5314/AD5324
Rev. H | Page 9 of 24
0.50
0
–0.50
0.25
–0.25
01
23
4
5
ER
R
O
R
(
L
S
B
)
VREF (V)
TA = 25°C
VDD = 5V
MAX INL
MAX DNL
MIN INL
MIN DNL
00
92
9-
01
1
Figure 11. AD5304 INL and DNL Error vs. VREF
0.5
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
–40
120
80
40
0
E
RRO
R
(
L
S
B)
TEMPERATURE (°C)
MAX INL
MAX DNL
MIN INL
MIN DNL
VDD = 5V
VREF = 3V
00
92
9-
0
12
Figure 12. AD5304 INL Error and DNL Error vs. Temperature
1.0
–1.0
–0.5
0
0.5
–40
120
80
40
0
E
R
RO
R
(
%
)
TEMPERATURE (°C)
VDD = 5V
VREF = 2V
GAIN ERROR
OFFSET ERROR
00
92
9-
0
13
Figure 13. AD5304 Offset Error and Gain Error vs. Temperature
0.2
–0.6
–0.5
–0.4
–0.3
–0.2
–0.1
0
0.1
06
5
4
3
2
1
ER
R
O
R
(%
)
VDD (V)
GAIN ERROR
OFFSET ERROR
TA = 25°C
VREF = 2V
00
92
9-
01
4
Figure 14. Offset Error and Gain Error vs. VDD
5
0
4
3
2
1
06
5
4
3
2
1
V
OU
T
(V
)
SINK/SOURCE CURRENT (mA)
5V SOURCE
3V SOURCE
5V SINK
3V SINK
00
92
9-
0
15
Figure 15. VOUT Source and Sink Current Capability
600
500
400
300
200
100
0
ZERO SCALE
FULL SCALE
I DD
(A
)
CODE
TA = 25°C
VDD = 5V
VREF = 2V
00
92
9-
0
16
Figure 16. Supply Current vs. DAC Code