參數(shù)資料
型號: AD524SD
廠商: Analog Devices Inc
文件頁數(shù): 1/28頁
文件大?。?/td> 0K
描述: IC AMP INST 1MHZ PREC LN 16CDIP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 儀表
電路數(shù): 1
轉(zhuǎn)換速率: 5 V/µs
增益帶寬積: 1MHz
-3db帶寬: 1MHz
電流 - 輸入偏壓: 50nA
電壓 - 輸入偏移: 100µV
電流 - 電源: 3.5mA
電壓 - 電源,單路/雙路(±): ±6 V ~ 18 V
工作溫度: -55°C ~ 125°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP 側(cè)面銅焊
包裝: 管件
Precision
Instrumentation Amplifier
AD524
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
FEATURES
Low noise: 0.3 μV p-p at 0.1 Hz to 10 Hz
Low nonlinearity: 0.003% (G = 1)
High CMRR: 120 dB (G = 1000)
Low offset voltage: 50 μV
Low offset voltage drift: 0.5 μV/°C
Gain bandwidth product: 25 MHz
Pin programmable gains of 1, 10, 100, 1000
Input protection, power-on/power-off
No external components required
Internally compensated
MIL-STD-883B and chips available
16-lead ceramic DIP and SOIC packages and 20-terminal
leadless chip carrier available
Available in tape and reel in accordance with EIA-481A
standard
Standard military drawing also available
FUNCTIONAL BLOCK DIAGRAM
AD524
20k
– INPUT
G = 10
+ INPUT
G = 100
G = 1000
4.44k
404
40
PROTECTION
20k
SENSE
REFERENCE
PROTECTION
RG1
RG2
1
13
12
11
16
3
2
Vb
OUTPUT
00
50
0-
0
01
Figure 1.
GENERAL DESCRIPTION
The AD524 is a precision monolithic instrumentation amplifier
designed for data acquisition applications requiring high accu-
racy under worst-case operating conditions. An outstanding
combination of high linearity, high common-mode rejection,
low offset voltage drift, and low noise makes the AD524 suitable
for use in many data acquisition systems.
The AD524 has an output offset voltage drift of less than
25 μV/°C, input offset voltage drift of less than 0.5 μV/°C, CMR
above 90 dB at unity gain (120 dB at G = 1000), and maximum
nonlinearity of 0.003% at G = 1. In addition to the outstanding
dc specifications, the AD524 also has a 25 kHz bandwidth
(G = 1000). To make it suitable for high speed data acquisition
systems, the AD524 has an output slew rate of 5 V/μs and settles
in 15 μs to 0.01% for gains of 1 to 100.
As a complete amplifier, the AD524 does not require any exter-
nal components for fixed gains of 1, 10, 100 and 1000. For other
gain settings between 1 and 1000, only a single resistor is required.
The AD524 input is fully protected for both power-on and
power-off fault conditions.
The AD524 IC instrumentation amplifier is available in four
different versions of accuracy and operating temperature range.
The economical A grade, the low drift B grade, and lower drift,
higher linearity C grade are specified from 25°C to +85°C.
The S grade guarantees performance to specification over the
extended temperature range 55°C to +125°C. The AD524 is
available in a 16-lead ceramic DIP, 16-lead SBDIP, 16-lead SOIC
wide packages, and 20-terminal leadless chip carrier.
PRODUCT HIGHLIGHTS
1.
The AD524 has guaranteed low offset voltage, offset
voltage drift, and low noise for precision high gain
applications.
2.
The AD524 is functionally complete with pin program-
mable gains of 1, 10, 100, and 1000, and single resistor
programmable for any gain.
3.
Input and output offset nulling terminals are provided for
very high precision applications and to minimize offset
voltage changes in gain ranging applications.
4.
The AD524 is input protected for both power-on and
power-off fault conditions.
5.
The AD524 offers superior dynamic performance with a
gain bandwidth product of 25 MHz, full power response of
75 kHz and a settling time of 15 μs to 0.01% of a 20 V step
(G = 100).
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