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參數(shù)資料
| 型號： | AD5247BKSZ50-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL 50K 128POS SC70-6 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 接片： | 128 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 45 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | I²C |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 6-TSSOP，SC-88，SOT-363 |
| 供應(yīng)商設(shè)備封裝： | SC-70-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 787 (CN2011-ZH PDF) |
| 配用： | AD5247EVAL-ND - BOARD EVAL FOR AD5247 |
| 其它名稱： | AD5247BKSZ50-RL7DKR |
Data Sheet
AD5247
Rev. F | Page 17 of 20
LAYOUT AND POWER SUPPLY BYPASSING
It is good practice to employ a compact, minimum lead-length
layout design. The leads to the inputs should be as direct as pos-
sible with minimum conductor length. Ground paths should
have low resistance and low inductance.
Similarly, it is good practice to bypass the power supplies with
quality capacitors for optimum stability. Supply leads to the device
should be bypassed with 0.01 F to 0.1 F disc or chip ceramic
capacitors. Low ESR 1 F to 10 F tantalum or electrolytic capaci-
tors should also be applied at the supplies to minimize any transient
disturbance and low frequency ripple (see Figure 40). Note that the
digital ground should also be joined remotely to the analog ground
at one point to minimize the ground bounce.
AD5247
VDD
C1
0.1F
C3
10F
GND
+
VDD
03876-
040
Figure 40. Power Supply Bypassing
CONSTANT BIAS TO RETAIN RESISTANCE SETTING
For users who desire nonvolatility but cannot justify the additional
cost for the EEMEM, the AD5247 can be considered a low cost
alternative because it maintains a constant bias to retain the
wiper setting. The AD5247 is specifically designed with low
power in mind, which allows low power consumption even in
battery-operated systems.
Figure 41 demonstrates the power consumption from a 3.4 V
450 mA/hr Li-Ion cell phone battery, which is connected to the
AD5247. The measurement over time shows that the device
draws approximately 1.3 A and consumes negligible power.
Over a course of 30 days, the battery was depleted by less than
2%, the majority of which was due to the intrinsic leakage
current of the battery itself.
DAYS
B
A
TTE
R
Y
L
IF
E
D
EPL
ET
ED
0
90%
92%
94%
96%
5
10
15
98%
100%
102%
104%
106%
108%
110%
20
25
30
TA = 25°C
03876-
041
Figure 41. Battery Operating Life Depletion
This demonstrates that constantly biasing the potentiometer
is a practical approach. Most portable devices do not require
the removal of batteries for charging. Although the resistance
setting of the AD5247 is lost when the battery needs replace-
ment, such events occur rather infrequently. As a result, this
inconvenience is justified by the lower cost and smaller size
offered by the AD5247. If total power is lost, the user should
be provided with a means to adjust the setting accordingly.
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