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| 型號： | AD5228BUJZ10-R2 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 10K UP/DN TSOT23-8 |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 接片： | 32 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 2 線按鈕 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 薄型，TSOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | TSOT-23-8 |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-AD5228EBZ-ND - BOARD EVAL FOR AD5228 DGTL POT |
AD5228
Rev. A | Page 13 of 20
Potentiometer Mode Operation
If all three terminals are used, the operation is called potenti-
ometer mode. The most common configuration is the voltage
divider operation as shown in Figure 36.
04422-0-037
A
W
B
VI
VC
Figure 36. Potentiometer Mode Configuration
The change of VWB is known provided that the AD5228
maximum or minimum scale has not been reached during
operation. If the effect of wiper resistance is ignored, the
transfer functions can be simplified as
A
WB
V
PU
V
32
+
=
Δ
(5)
A
WB
V
PD
V
32
+
=
Δ
(6)
Unlike in rheostat mode operation where the absolute tolerance
is high, potentiometer mode operation yields an almost ratio-
metric function of PU/32 or PD/32 with a relatively small error
contributed by the RW term. The tolerance effect is, therefore,
almost canceled. Although the thin film step resistor RS and
CMOS switch resistance, RW, have very different temperature
coefficients, the ratiometric adjustment also reduces the overall
temperature coefficient effect to 5 ppm/°C except at low value
codes where RW dominates.
Potentiometer mode operations include an op amp input and
feedback resistors network and other voltage scaling applications.
The A, W, and B terminals can be input or output terminals and
have no polarity constraint provided that |VAB|, |VWA|, and |VWB|
do not exceed VDD-to-GND.
CONTROLLING INPUTS
All PU and PD inputs are protected with a Zener ESD structure
as shown in
.
04422-0-038
VDD
PU
100k
Ω
DECODE
AND
DEBOUNCE
CKT
Figure 37. Equivalent ESD Protection in PU and PD Pins
PU and PD pins are usually connected to pushbutton tactile
switches for manual operation, but the AD5228 can also be
controlled digitally. It is recommended to add external
MOSFETs or transistors that simplify the logic controls.
04422-0-039
UP/DOWN
CONTROL
LOGIC
DISCRETE
STEP/AUTO
SCAN DETECT
ADAPTIVE
DEBOUNCER
ZERO- OR MID-
SCALE PRESET
AD5228
R1
R2
D
E
C
O
D
E
A
W
B
VDD
PRE
GND
PU
PD
DOWN
N2
2N7002
UP
N1
2N7002
Figure 38. Digital Control with External MOSFETs
TERMINAL VOLTAGE OPERATION RANGE
The AD5228 is designed with internal ESD diodes for
protection. These diodes also set the voltage boundary of the
terminal operating voltages. Positive signals present on
Terminal A, B, or W that exceed VDD are clamped by the
forward-biased diode. There is no polarity constraint between
VA, VW, and VB, but they cannot be higher than VDD or lower
than GND.
0
4422-0-040
VDD
GND
A
W
B
Figure 39. Maximum Terminal Voltages Set by VDD and GND
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| AD5228BUJZ10-RL7 | 功能描述:IC DGTL POT UP/DN 10K TSOT23-8 RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲器類型:非易失 接口:3 線串口 電源電壓:2.7 V ~ 5.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN-EP（3x3） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1399 (CN2011-ZH PDF) 其它名稱:MAX5423ETA+TCT |
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| AD5228BUJZ502-RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Position Manual Up/Down Control Potentiometer |
| AD5228BUJZ50-R2 | 功能描述:IC DGTL POT 50K UP/DN TSOT23-8 RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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