V
參數(shù)資料
型號: AD5201BRMZ50-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 6/15頁
文件大小: 0K
描述: IC DGTL POT 50K 33POS 10-MSOP
標準包裝: 1,000
接片: 33
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標準值 500 ppm/°C
存儲器類型: 易失
接口: 3 線串行(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V,±2.3 V ~ 2.7 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-MSOP
包裝: 帶卷 (TR)
其它名稱: AD5201BRMZ50REEL7
AD5200/AD5201
–14–
TEST CIRCUITS
Figures 6 to 14 define the test conditions used in the product
specification table.
VMS
A
W
B
DUT
V+
V+ = VDD
1 LSB = V+/2N
Figure 6. Potentiometer Divider Nonlinearity Error Test
Circuit (INL, DNL)
VMS
A
W
B
DUT
NO CONNECT
IW
Figure 7. Resistor Position Nonlinearity Error
(Rheostat Operation; R-INL, R-DNL)
VMS1
A
W
B
DUT
IW = VDD/RNOMINAL
VMS2
VW
RW = [VMS1 – VMS2]/IW
Figure 8. Wiper Resistance Test Circuit
VMS%
VDD%
PSS (%/%) =
V+ = VDD 10%
PSRR (dB) = 20 LOG
VMS
VDD
VMS
A
W
B
V+
VDD
VA
Figure 9. Power Supply Sensitivity Test Circuit
(PSS, PSRR)
OP279
W
5V
B
VOUT
OFFSET
GND
OFFSET BIAS
A
DUT
VIN
Figure 10. Inverting Gain Test Circuit
OFFSET BIAS
B
OFFSET
GND
A
DUT
OP279
W
5V
VOUT
VIN
Figure 11. Noninverting Gain Test Circuit
OP42
VOUT
VIN
+15V
OFFSET
GND
–15V
W
B
A
2.5V
Figure 12. Gain vs. Frequency Test Circuit
W
B
VSS TO VDD
DUT
ISW
CODE = OOH
RSW =
0.1V
ISW
0.1V
+
Figure 13. Incremental ON Resistance Test Circuit
ICM
A
W
B
NC
GND
NC
VSS
VDD
DUT
VCM
NC = NO CONNECT
Figure 14. Common-Mode Leakage Current Test Circuit
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