參數(shù)資料
型號: AD5172BRMZ100-RL7
廠商: Analog Devices Inc
文件頁數(shù): 16/28頁
文件大?。?/td> 0K
描述: IC DGTL POT DUAL 100K I2C 10MSOP
標準包裝: 1
接片: 256
電阻(歐姆): 100k
電路數(shù): 2
溫度系數(shù): 標準值 35 ppm/°C
存儲器類型: 非易失
接口: I²C
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-MSOP
包裝: 標準包裝
其它名稱: AD5172BRMZ100RLDKR
Data Sheet
AD5172/AD5173
Rev. I | Page 23 of 28
Multiple Devices on One Bus (AD5173 Only)
Figure 52 shows four AD5173 devices on the same serial bus.
Each has a different slave address because the states of the AD0
and AD1 pins are different. This allows each device on the bus to
be written to or read from independently. The master device
output bus line drivers are open-drain pull-downs in a fully
I2C-compatible interface.
SDA
AD1
AD0
MASTER
SCL
AD5173
SDA
AD1
AD0
SCL
AD5173
SDA
AD1
AD0
SCL
AD5173
SDA
5V
RP
5V
AD1
AD0
SCL
AD5173
04103-
044
Figure 52. Multiple AD5173 Devices on One I2C Bus
LEVEL SHIFTING FOR DIFFERENT VOLTAGE
OPERATION
If the SCL and SDA signals come from a low voltage logic
controller and are below the minimum VIH level (0.7 V × VDD),
level shift the signals for read/write communications between
the AD5172/AD5173 and the controller. Figure 53 shows one
of the implementations. For example, when SDA1 is at 2.5 V,
M1 turns off, and SDA2 becomes 5 V. When SDA1 is at 0 V,
M1 turns on, and SDA2 approaches 0 V. As a result, proper
level shifting is established. It is best practice for M1 and M2
to be low threshold N-channel power MOSFETs, such as the
FDV301N from Fairchild Semiconductor.
2.5V
CONTROLLER
2.7V TO 5.5V
AD5172/
AD5173
RP
VDD1 = 2.5V
VDD2 = 5V
G
S
D
M1
S
D
M2
SDA1
SCL1
SDA2
SCL2
04103-
061
Figure 53. Level Shifting for Different Voltage Operation
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