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| 型號： | AD5165BUJZ100-R2 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 100K LP TSOT23-8 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線串行（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 薄型，TSOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | TSOT-23-8 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 786 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5165EBZ-ND - BOARD EVALUATION FOR AD5165 |
| 其它名稱： | AD5165BUJZ100-R2DKR |
AD5165
Rev. 0 | Page 13 of 16
THEORY OF OPERATION
The AD5165 is a 256-position digitally controlled variable
resistor (VR) device.
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation
The nominal resistance of the RDAC between terminals A and
B is available in 100 k. The nominal resistance (RAB) of the VR
has 256 contact points accessed by the wiper terminal, plus the
B terminal contact. The 8-bit data in the RDAC latch is decoded
to select one of the 256 possible settings.
A
W
B
A
W
B
A
W
B
04749-0-038
Figure 36. Rheostat Mode Configuration
Assuming that a 100 k part is used, the wiper’s first connec-
tion starts at the B terminal for data 0x00. Because there is a
50 wiper contact resistance, such a connection yields a mini-
mum of 100 (2 × 50 ) resistance between terminals W and
B. The second connection is the first tap point, which corres-
ponds to 490 (RWB = RAB/256 + 2 × RW = 390 + 2 × 50 )
for data 0x01. The third connection is the next tap point,
representing 880 (2 × 390 + 2 × 50 ) for data 0x02, and
so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 100,100
(RAB + 2 × RW).
D5
D4
D3
D7
D6
D2
D1
D0
RDAC
LATCH
AND
DECODER
RS
A
W
B
04749-0-039
Figure 37. AD5165 Equivalent RDAC Circuit
The general equation determining the digitally programmed
output resistance between W and B is
W
AB
WB
R
D
R
×
+
×
=
2
256
)
(
(1)
where:
D is the decimal equivalent of the binary code loaded in the
8-bit RDAC register.
RAB is the end-to-end resistance.
RW is the wiper resistance contributed by the on resistance of
the internal switch.
In summary, if RAB = 100 k and the A terminal is open
circuited, the following output resistance RWB is set for the
indicated RDAC latch codes.
Table 6. Codes and Corresponding RWB Resistance
D (Dec.)
RWB ()
Output State
255
99,710
Full scale (RAB – 1 LSB + RW)
128
50,100
Midscale
1
490
1 LSB
0
100
Zero scale (wiper contact resistance)
Note that, in the zero-scale condition, a finite wiper resistance
of 100 is present. Care should be taken to limit the current
flow between W and B in this state to a maximum pulse current
of no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the wiper W and terminal A also produces a
digitally controlled complementary resistance, RWA. When these
terminals are used, the B terminal can be opened. Setting the
resistance value for RWA starts at a maximum value of resistance
and decreases as the data loaded in the latch increases in value.
The general equation for this operation is
W
AB
WA
R
D
R
×
+
×
=
2
256
)
(
(2)
For RAB = 100 k with the B terminal open circuited, the
following output resistance RWA is set for the indicated RDAC
latch codes.
Table 7. Codes and Corresponding RWA Resistance
D (Dec.)
RWA ()
Output State
255
490
Full scale
128
50,100
Midscale
1
99, 710
1 LSB
0
100,100
Zero scale
Typical device-to-device matching is process-lot dependent
and may vary by up to ±20%. Because the resistance element
is processed in thin film technology, the change in RAB with
temperature has a very low 35 ppm/°C temperature coefficient.
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