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參數(shù)資料
| 型號： | AD5111BCPZ10-500R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 128POS 10K 8LFCSP |
| 標準包裝： | 500 |
| 接片： | 128 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 35 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 3 線串行（芯片選擇，增/減） |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-UFDFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 8-LFCSP-UD（2x2） |
| 包裝： | 帶卷 (TR) |
Data Sheet
AD5111/AD5113/AD5115
Rev.
| Page 19 of 24
RDAC ARCHITECTURE
To achieve optimum performance, Analog Devices, Inc., has
patented the RDAC segmentation architecture for all the digital
employ a two-stage segmentation approach as shown in
designed with the transmission gate CMOS topology and with
the gate voltage derived from VDD.
RL
RS
W
RS
A
B
BS
5-BIT/6-BIT/7-BIT
ADDRESS
DECODER
TS
09
65
4-
0
43
Low Wiper Resistance Feature
feature to reduce the resistance between terminals. These extra
steps are called bottom scale and top scale. At bottom scale, the
typical wiper resistance decreases from 70 Ω to 45 Ω. At top
scale, the resistance between Terminal A and Terminal W is
decreased by 1 LSB and the total resistance is reduced to 70 Ω.
The extra steps are not equal to 1 LSB and are not included in
the INL, DNL, R-INL, and R-DNL specifications.
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation—±8% Resistor Tolerance
only two terminals are used as a variable resistor. The unused
terminal can be floating or tied to the W terminal as shown in
A
W
B
A
W
B
A
W
B
09
65
4-
04
4
Figure 43. Rheostat Mode Configuration
The nominal resistance between Terminal A and Terminal B,
RAB, is available in 5 kΩ, 10 kΩ, and 80 kΩ and has 128/64/32
tap points accessed by the wiper terminal. The 5-/6-/7-bit data
in the RDAC latch is decoded to select one of the 128/64/32
possible wiper settings. The general equations for determining
the digitally programmed output resistance between the W
terminal and B terminal are
BS
WB
R
Bottom scale (1)
W
AB
WB
R
D
R
128
)
(
From 0 to 128 (2)
BS
WB
R
Bottom scale (3)
W
AB
WB
R
D
R
64
)
(
From 0 to 64 (4)
BS
WB
R
Bottom scale (5)
W
AB
WB
R
D
R
32
)
(
From 0 to 32 (6)
where:
D is the decimal equivalent of the binary code in the 5-/6-/7-bit
RDAC register; 128, 64, and 32 refer to the top scale step.
RAB is the end-to-end resistance.
RW is the wiper resistance.
RBS is the wiper resistance at bottom scale.
A
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