參數(shù)資料
型號(hào)： AD5045BRUZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 23/28頁(yè)
文件大小： 0K
描述： IC DAC DUAL 14BIT SPI 14TSSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1,000
系列： nanoDAC™
設(shè)置時(shí)間： 5.8µs
位數(shù)： 14
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
功率耗散（最大）： 13.5mW
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 14-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 14-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： *
AD5025/AD5045/AD5065
Rev. 0 | Page 4 of 28
Parameter
B Grade1
A Grade1, 2
Unit
Conditions/Comments
Min
Typ
Max
Min
Typ
Max
LOGIC INPUTS
Input Current5
±1
μA
Input Low Voltage, VINL
0.8
V
Input High Voltage, VINH
2.2
V
Pin Capacitance4
4
pF
LOGIC OUTPUTS (SDO)3, 4
Output Low Voltage, VOL
0.4
V
ISINK = 2 mA
Output High Voltage, VOH
VDD 1
ISOURCE = 2 mA
High Impedance Leakage
±0.002
±1
±0.002
±1
μA
High Impedance Output
Capacitance
7
pF
POWER REQUIREMENTS
VDD
4.5
5.5
4.5
5.5
V
DAC active, excludes load current
Normal Mode
2.2
2.7
2.2
2.7
mA
VIH = VDD and VIL = GND
All Power-Down Modes7
0.4
2
0.4
2
μA
TA = 40°C to +105°C
30
μA
TA = 40°C to +125°C
1 Temperature range is 40°C to +125°C, typical at 25°C.
2 A grade offered in AD5065 only.
3 Linearity calculated using a reduced code range—AD5065: Code 512 to Code 65,024; AD5045: Code 128 to Code 16,256; AD5025: Code 32 to Code 4064. Output
unloaded.
4 Guaranteed by design and characterization; not production tested.
5 Current flowing into or out of individual digital pins.
6 Interface inactive. All DACs active. DAC outputs unloaded.
7 Both DACs powered down.
AC CHARACTERISTICS
VDD = 4.5 V to 5.5 V, RL = 5 kΩ to GND, CL = 200 pF to GND, 2.5 V ≤ VREFIN ≤ VDD. All specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter1
Min
Typ
Max
Unit
Conditions/Comments2
Output Voltage Settling Time
5.8
8
μs
to scale settling to ±1 LSB, RL = 5 kΩ single-channel update
including DAC calibration sequence
Output Voltage Settling Time
10.7
13
μs
to scale settling to ±1 LSB, RL = 5 kΩ all channel update including
DAC calibration sequence
Slew Rate
1.5
V/μs
Digital-to-Analog Glitch Impulse3
4
nV-sec
1 LSB change around major carry
Reference Feedthrough3
90
dB
VREF = 3 V ± 0.86 V p-p, frequency = 100 Hz to 100 kHz
SDO Feedthrough
0.07
nV-sec
Daisy-chain mode; SDO load is 10 pF
Digital Feedthrough3
0.1
nV-sec
Digital Crosstalk3
1.9
nV-sec
Analog Crosstalk3
1.2
nV-sec
DAC-to-DAC Crosstalk3
2.1
nV-sec
Multiplying Bandwidth3
340
kHz
VREF = 3 V ± 0.86 V p-p
Total Harmonic Distortion3
80
dB
VREF = 3 V ± 0.86 V p-p, frequency = 10 kHz
Output Noise Spectral Density
64
nV/√Hz
DAC code = 0x8400, 1 kHz
60
nV/√Hz
DAC code = 0x8400, 10 kHz
Output Noise
6
μV p-p
0.1 Hz to 10 Hz
1 Guaranteed by design and characterization; not production tested.
2 Temperature range is 40°C to + 125°C, typical at 25°C.
3 See the Terminology section.
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