參數(shù)資料
型號(hào): AD2S80AUD
廠商: Analog Devices Inc
文件頁數(shù): 12/20頁
文件大小: 0K
描述: IC R/D CONV TRACKING 40CDIP
標(biāo)準(zhǔn)包裝: 1
類型: R/D 轉(zhuǎn)換器
輸入類型: 并聯(lián)
輸出類型: 數(shù)字
接口: 并聯(lián)
電流 - 電源: 30mA
安裝類型: 通孔
封裝/外殼: 40-CDIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 40-DIP
包裝: 管件
AD2S80A–SPECIFICATIONS
Parameter
Conditions
Min
Typ
Max
Unit
SIGNAL INPUTS
Frequency
50
20,000
Hz
Voltage Level
1.8
2.0
2.2
V rms
Input Bias Current
60
150
nA
Input Impedance
1.0
M
Maximum Voltage
8V pk
REFERENCE INPUT
Frequency
50
20,000
Hz
Voltage Level
1.0
8.0
V pk
Input Bias Current
60
150
nA
Input Impedance
1.0
M
CONTROL DYNAMICS
Repeatability
1
LSB
Allowable Phase Shift
(Signals to Reference)
–10
+10
Degrees
Tracking Rate
10 Bits
1040
rps
12 Bits
260
rps
14 Bits
65
rps
16 Bits
16.25
rps
User Selectable
ACCURACY
Angular Accuracy
A, J, S
8 +1 LSB
arc min
B, K, T
4 +1 LSB
arc min
L, U
2 +1 LSB
arc min
Monotonicity
Guaranteed Monotonic
Missing Codes (16-Bit Resolution)
A, B, J, K, S, T
4
Codes
L, U
1
Code
VELOCITY SIGNAL
Linearity
Over Full Range
±1
3
% FSD
Reversion Error
±1
±2
% FSD
DC Zero Offset
6
mV
DC Zero Offset Tempco
–22
V/°C
Gain Scaling Accuracy
±10
% FSD
Output Voltage
1 mA Load
±8
±9
±10.5
V
Dynamic Ripple
Mean Value
1.5
% rms O/P
Output Load
1.0
k
INPUT/OUTPUT PROTECTION
Analog Inputs
Overvoltage Protection
±8V
Analog Outputs
Short Circuit O/P Protection
±5.6
±8
±10.4
mA
DIGITAL POSITION
Resolution
10, 12, 14, and 16
Output Format
Bidirectional Natural Binary
Load
3
LSTTL
Sense
Logic LO to Inhibit
Time to Stable Data
600
ns
Logic LO Enables Position
Output. Logic HI Outputs in
ENABLE Time
High Impedance State
35
110
ns
BYTE SELECT
Sense
MS Byte DB1–DB8,
LS Byte DB9–DB16
LOGIC LO
LS Byte DB1–DB8,
LS Byte DB9–DB16
Time to Data Available
60
140
ns
SHORT CYCLE INPUTS
Internally Pulled High
(100 k
) to +V
S
SC1
SC2
0
10 Bit
0
1
12 Bit
1
0
14 Bit
1
16 Bit
(typical at 25 C unless otherwise noted)
–2–
REV. B
C
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