參數(shù)資料
型號: AD215AY
廠商: Analog Devices Inc
文件頁數(shù): 11/12頁
文件大小: 0K
描述: IC AMP ISOL LDIST 5MA 44SIP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 隔離
電路數(shù): 1
轉(zhuǎn)換速率: 6 V/µs
-3db帶寬: 120kHz
電流 - 輸入偏壓: 300pA
電壓 - 輸入偏移: 400µV
電流 - 電源: 40mA
電流 - 輸出 / 通道: 5mA
電壓 - 電源,單路/雙路(±): ±14.25 V ~ 17 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 44-SIP,12 引線,偏移引線
供應(yīng)商設(shè)備封裝: 12-SIP
包裝: 管件
AD215
REV. 0
–8–
Compensating the Uncommitted Input Op Amp
The open-loop gain and phase versus frequency for the uncom-
mitted input op amp are given in Figure 14. These curves can
be used to determine appropriate values for the feedback resis-
tor (RF) and compensation capacitor (CF) to ensure frequency
stability when reactive or nonlinear components are used.
FREQUENCY – Hz
100k
100M
1M
AVERAGE
VOLTAGE
GAIN
dB
10M
25
20
–25
15
10
5
0
–5
–10
–15
–20
PHASE
GAIN
,
EXCESS
PHASE
Degrees
80
100
280
120
140
160
180
200
220
240
260
Figure 14. Open-Loop Gain and Frequency Response
Inverting, Summing or Current Input Configuration
Figure 14 shows how the AD215 can measure currents or sum
currents or voltages.
VS1
IN+
IN–
FB
IN COM
OUT HI
OUT LO
PWR
RTN
COM
TRIM
OUTPUT
FILTER,
BUFFER
AND
TRIM
CIRCUITRY
1
3
4
2
38
36
37
43
AD215
CF
47pF
RF
RS1
VS2
RS2
IS
Figure 15. Noninverting Summing/Current Configuration
For this circuit, the output voltage equation is:
VO = –RF × (IS + VS1/RS1 + VS2/RS2 + . . .)
where:
V
= Output Voltage (V)
VS1
= Input Voltage Signal 1 (V)
VS2
= Input Voltage Signal 2 (V)
IS
= Input Current Source (A)
RF
= Feedback Resistor (
) (10 k, typ)
RS1
= Input Signal 1 Source Resistance (
)
RS2
= Input Signal 2 Source Resistance (
)
The circuit of Figure 15 can also be used when the input signal
is larger than the
±10 V input range of the isolator. For example,
in Figure 15, if only VS1, RS1 and RF were connected as shown
with the solid lines, the input voltage span of VS1 could accom-
modate up to
±50 V when R
F = 10 k
and R
S1 = 50 k
.
GAIN AND OFFSET ADJUSTMENTS
General Comments
The AD215 features an output stage TRIM pin useful for zero-
ing the output offset voltage through use of user supplied circuitry.
When gain and offset adjustments are required, the actual com-
pensation circuit ultimately used depends on the following:
The input configuration mode of the isolation amplifier (non-
inverting or inverting).
The placement of any adjusting potentiometer (on the
isolator’s input or output side).
As a general rule:
Gain adjustments should be accomplished at the gain-setting
resistor network at the isolator’s input.
To ensure stability in the gain adjustment, potentiometers
should be located as close as possible to the isolator’s input
and its impedance should be kept low. Adjustment ranges
should also be kept to a minimum since their resolution and
stability is dependent upon the actual potentiometers used.
Output adjustments may be necessary where adjusting poten-
tiometers placed near the input would present a hazard to the
user due to the presence of high common-mode voltages dur-
ing the adjustment procedure.
It is recommended that input offset adjustments are made
prior to gain adjustments.
The AD215 should be allowed to warm up for approximately
10 minutes before gain or offset adjustments are made.
Input Gain Adjustments for Noninverting Mode
Figure 16 shows a suggested noninverting gain adjustment cir-
cuit. Note that the gain adjustment potentiometer RP is incorpo-
rated into the gain-setting resistor network.
RIN = 2k
VSIGNAL
IN+
IN–
FB
IN COM
OUT HI
OUT LO
PWR
RTN
COM
TRIM
OUTPUT
FILTER,
BUFFER
AND
TRIM
CIRCUITRY
1
3
4
2
38
36
37
43
AD215
CF
0.47pF
RF
RG
RC
RP
Figure 16. Gain Adjustment for Noninverting Configuration
For a
±1% trim range:
(RP ≈1k), RC ≈ 0.02 ×
RG × RF
RG + RF
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