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參數(shù)資料
| 型號： | AD1941YSTZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/36頁 |
| 文件大小： | 0K |
| 描述： | IC DSP AUDIO 16CHAN 28BIT 48LQFP |
| 標準包裝： | 2,000 |
| 系列： | SigmaDSP® |
| 類型： | 音頻處理器 |
| 應用： | 車載系統(tǒng)，家庭影院，電視 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
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AD1940/AD1941
Rev. B | Page 18 of
36
R/W
SCK
ADR
SEL
R/W
ADR
SEL
04607-028
SDA
START BY
MASTER
ACK. BY
AD1941
ACK. BY
AD1941
FRAME 2
SUBADDRESS BYTE 1
FRAME 1
CHIP ADDRESS BYTE 1
FRAME 3
SUBADDRESS BYTE 2
FRAME 4
CHIP ADDRESS BYTE
ACK. BY
AD1941
REPEATED
START BY
MASTER
SCK
(CONTINUED)
SDA
(CONTINUED)
SCK
STOP BY
MASTER
ACK. BY
MASTER
FRAME 6
READ DATA BYTE 2
ACK. BY
MASTER
(CONTINUED)
SDA
(CONTINUED)
ACK. BY
AD1941
FRAME 5
READ DATA BYTE 1
Figure 14. AD1941 I2C Read Format
Table 13. Single Word I2C Write
S
Chip Address,
R/W = 0
AS
Subaddress High
AS
Subaddress Low
AS
Data Byte 1
AS
Data Byte 2
…
AS
Data Byte N
P
Table 14. Burst Mode I2C Write
S
Chip
Address,
R/W = 0
AS
Subaddress
High
AS
Subaddress
Low
AS
Data
Word 1,
Byte 1
AS
Data
Word 1,
Byte 2
AS
Data
Word 2,
Byte 1
AS
Data
Word 2,
Byte 2
AS
…
P
Table 15. Single Word I2C Read
S
Chip
Address,
R/W = 0
AS
Subaddress
High
AS
Subaddress
Low
AS
S
Chip
Address,
R/W = 1
AS
Data
Byte 1
AM
Data
Byte 2
…
AM
Data
Byte N
P
Table 16. Burst Mode I2C Read
S
Chip
Address,
R/W = 0
AS
Subaddress
High
AS
Subaddress
Low
AS
S
Chip
Address,
R/W = 1
AS
Data
Word 1,
Byte 1
AM
Data
Word 1,
Byte 2
AM
…
P
S - Start Bit
P - Stop Bit
AM - Acknowledge by Master
AS - Acknowledge by Slave
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