VL to DGND . . . . . . . . . . . . . . . . " />
參數(shù)資料
型號: AD1866RZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 7/12頁
文件大小: 0K
描述: IC DAC AUDIO DUAL SGL 16SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 70mW
工作溫度: -35°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電壓,雙極
采樣率(每秒): *
AD1866
REV. 0
–4–
ABSOLUTE MAXIMUM RATINGS*
VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6 V
VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±0.3 V
Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . –0.3 V to VL
Soldering (10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +300
°C
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD1866 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
LL
DL
CLK
DR
LR
DGND
V
L
NRL
AGND
NRR
VS
1
2
3
4
5
6
7
8
9
10
12
13
14
15
11
16
AD1866
16-BIT
DAC
16-BIT
DAC
16-BIT
SERIAL
REGISTER
16-BIT
SERIAL
REGISTER
VBL
VOR
VS
VBR
V
REF
V
REF
VOL
PIN DESIGNATIONS
Pin
Mnemonic
Description
11VL
Digital Supply (+5 V)
12
LL
Left Channel Latch Enable Pin
13
DL
Left Channel Data Input Pin
14
CLK
Clock Input Pin
15
DR
Right Channel Data Input Pin
16
LR
Right Channel Latch Enable Pin
17
DGND
Digital Common Pin
18VBR
Right Channel Bias Pin
19VS
Analog Supply (+5 V)
10
VOR
Right Channel Output Pin
11
NRR
Right Channel Noise Reduction Pin
12
AGND
Analog Common Pin
13
NRL
Left Channel Noise Reduction Pin
14
VOL
Left Channel Output Pin
15
VS
Analog Supply (+5 V)
16
VBL
Left Channel Bias Pin
ORDERING GUIDE
Temperature
Package
Model
Range
Description
Option
AD1866N
–35
°C to +85°C
Plastic DIP
N-16
AD1866R
–35
°C to +85°C
SOIC
R-16
AD1866R-REEL
–35
°C to +85°C
SOIC
R-16
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