tDLS BCLK L/ RCLK SDATA LEFT-JUSTIFIED MODE SDATA RIGHT-JUSTIFIED MODE LSB SDATA
參數(shù)資料
型號: AD1854JRSZ
廠商: Analog Devices Inc
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC DAC STEREO 96KHZ 5V 28SSOP
產(chǎn)品培訓模塊: Interfacing AV Converters to Blackfin Processors
Data Converter Fundamentals
DAC Architectures
標準包裝: 47
位數(shù): 20
數(shù)據(jù)接口: DSP,I²S,串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 250mW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應商設備封裝: 28-SSOP
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極
采樣率(每秒): 96k
產(chǎn)品目錄頁面: 781 (CN2011-ZH PDF)
AD1854
–9–
REV. A
tDLS
BCLK
L/
RCLK
SDATA
LEFT-JUSTIFIED
MODE
SDATA
RIGHT-JUSTIFIED
MODE
LSB
SDATA
I2S-JUSTIFIED
MODE
tDBH
tDBP
tDBL
tDDS
MSB
MSB-1
tDDH
tDDS
MSB
tDDH
tDDS
tDDH
MSB
Figure 9. Serial Data Port Timing
BCLK
L/
RCLK
SDATA
LEFT-JUSTIFIED
DSP SERIAL
PORT STYLE MODE
MSB-1
tDBH
tDBP
tDBL
tDLS
tDLH
tDDS
tDDH
MSB
Figure 10. Serial Data Port Timing–DSP Serial Port Style Mode
PD/RST
MCLK
tPDRP
tDMP
tDMH
tDML
Figure 11.
Power-Down/Reset Timing
Timing Diagrams
The serial data port timing is shown in Figures 9 and 10. The
minimum bit clock HI pulsewidth is tDBH and the minimum bit
clock LO pulsewidth is tDBL. The minimum bit clock period is
tDBP. The left/right clock minimum setup time is tDLS and the
left/right clock minimum hold time is tDLH. The serial data
minimum setup time is tDDS and the minimum serial data hold
time is tDDH.
The power-down/reset timing is shown in Figure 11. The mini-
mum reset LO pulse width is tPDRP (four MCLK periods) to
accomplish a successful AD1854 reset operation.
相關(guān)PDF資料
PDF描述
MS3452W28-15S CONN RCPT 35POS BOX MNT W/SCKT
MS3452L28-15S CONN RCPT 35POS BOX MNT W/SCKT
MS27472T18B96SA CONN RCPT 9POS WALL MT W/SCKT
AD9709ASTZ IC DAC 8BIT DUAL 125MSPS 48-LQFP
MS27467T25F19PD CONN PLUG 19POS STRAIGHT W/PINS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD1854JRSZRL 功能描述:IC DAC STEREO 96KHZ 5V 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:47 系列:- 設置時間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散(最大):55µW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP(0.209",5.30mm 寬) 供應商設備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類型:1 電流,單極;1 電流,雙極 采樣率(每秒):*
AD1854KRS 制造商:Analog Devices 功能描述:DAC 2-CH Delta-Sigma 24-bit 28-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:STEREO,96KHZ, MULTIBIT SIGMA DELTA DAC - Bulk
AD1854KRSRL 制造商:Analog Devices 功能描述:DAC 2-CH Delta-Sigma 24-bit 28-Pin SSOP T/R 制造商:Analog Devices 功能描述:DAC 2CH DELTA-SIGMA 24BIT 28SSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:STEREO,96KHZ, MULTIBIT SIGMA DELTA DAC - Tape and Reel
AD1855 制造商:AD 制造商全稱:Analog Devices 功能描述:Stereo, 96 kHz, Multibit DAC