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參數(shù)資料
| 型號： | AD1839AAS-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP52 |
| 封裝： | PLASTIC, MS-022-AC, MQFP-52 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大小： | 674K |
| 代理商： | AD1839AAS-REEL |
AD1839A
TIMING SPECIFICATIONS
Table 2.
Parameter
MASTER CLOCK AND RESET
t
MH
t
ML
t
PDR
SPI PORT
t
CCH
t
CCL
t
CCP
t
CDS
t
CDH
t
CLS
t
CLH
t
COE
t
COD
t
COTS
DAC SERIAL PORT (48 kHz and 96 kHz)
Normal Mode (Slave)
t
DBH
t
DBL
f
DB
t
DLS
t
DLH
t
DDS
t
DDH
Packed 128/256 Modes (Slave)
t
DBH
t
DBL
f
DB
t
DLS
t
DLH
t
DDS
t
DDH
ADC SERIAL PORT (48 kHz and 96 kHz)
Normal Mode (Master)
t
ABD
t
ALD
t
ABDD
Normal Mode (Slave)
t
ABH
t
ABL
f
AB
t
ALS
t
ALH
t
ABDD
Packed 128/256 Mode (Master)
t
PABD
t
PALD
t
PABDD
Rev. B | Page 5 of 24
MCLK High
MCLK Low
PD/RST Low
CCLK High
CCLK Low
CCLK Period
CDATA Setup
CDATA Hold
CLATCH Setup
CLATCH Hold
COUT Enable
COUT Delay
COUT Three-State
DBCLK High
DBCLK Low
DBCLK Frequency
DLRCLK Setup
DLRCLK Hold
DSDATA Setup
DSDATA Hold
DBCLK High
DBCLK Low
DBCLK Frequency
DLRCLK Setup
DLRCLK Hold
DSDATA Setup
DSDATA Hold
ABCLK Delay
ALRCLK Delay
ASDATA Delay
ABCLK High
ABCLK Low
ABCLK Frequency
ALRCLK Setup
ALRCLK Hold
ASDATA Delay
ABCLK Delay
LRCLK Delay
ASDATA Delay
Min
15
15
20
40
40
80
10
10
10
10
60
60
64 × f
S
10
10
10
10
15
15
256 × f
S
10
10
10
10
60
60
64 × f
S
5
15
Max
15
20
25
25
5
10
15
40
5
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Comments
To CCLK rising edge
From CCLK rising edge
To CCLK rising edge
From CCLK rising edge
From CLATCH falling edge
From CCLK falling edge
From CLATCH rising edge
To DBCLK rising edge
From DBCLK rising edge
To DBCLK rising edge
From DBCLK rising edge
To DBCLK rising edge
From DBCLK rising edge
To DBCLK rising edge
From DBCLK rising edge
From MCLK rising edge
From ABCLK falling edge
From ABCLK falling edge
To ABCLK rising edge
From ABCLK rising edge
From ABCLK falling edge
From MCLK rising edge
From ABCLK falling edge
From ABCLK falling edge
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1839AASZ | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 6DAC 24-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:HIGH PERFORMANCE CODEC I.C. - Bulk |
| AD1839AASZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec |
| AD1839AASZ-REEL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 6DAC 24-Bit 52-Pin MQFP T/R |
| AD1839AASZ-REEL1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec |
| AD1839AEB | 制造商:AD 制造商全稱:Analog Devices 功能描述:2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec |
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