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參數(shù)資料
| 型號： | ACT15530PS |
| 廠商： | Aeroflex Inc. |
| 英文描述： | CMOS Manchester Encoder / Decoder |
| 中文描述： | 的CMOS曼徹斯特編碼器/解碼器 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 131K |
| 代理商： | ACT15530PS |
eroflex Circuit T
echnology
– Data Bus Modules For The Future SCD15330 REV B 7/28/99
Features
MIL-STD-1553 Compatible
1.25 Megabit/sec Maximum Data Rate
Sync Identification and Lock-in
Clock Recovery
Manchester II Encode / Decode
Separate Encoder and Decoder Sections
Low Operating Power
Military Temperature Range -55°C to +125°C
Monolithic – Single Chip – Construction
Available in Commercial and Industrial Temperature Ranges
Several Package and Quality Options (Consult Factory for Details)
Direct Replacement for the Obsolete Harris HD15530-9/-2/8 and GEC Plessey Marconi
MA15530 / MAS15530 parts
1
General Description
The ACT15530 is a high performance CMOS integrated circuit used to implement MIL-STD-1553 and
similar Manchester II encoded, time division multiplexed, serial data protocols. The device is divided into
two independent sections, encoder and decoder, with a common master reset. The function of the encoder
section is to produce the sync pulse and parity bit, and encode the data bits. The decoder section recognizes
the sync pulse, decodes the data bits and checks for parity.
The ACT15530 is fully guaranteed to support the 1 MHz data rate of MIL-STD-1553 over the full
temperature and supply voltage ranges. The device interfaces with CMOS, TTL or N-Channel support
circuitry and operates from a standard 5 volt supply. The circuit can also be used in many party line digital
data communications applications where high reliability command and control signals are required. Using
Aeroflex transceivers products (4400 Series) the Bit Error Rates (BER) and Word Error Rates (WER) of
MIL-STD-1553 can be achieved (Refer to MIL-STD-1553 Multiplex Applications Handbook
"MIL-HDBK-1553").
CMOS Manchester Encoder / Decoder
CIRCUIT TECHNOLOGY
www.aeroflex.com
V
DD
Encoder Clock
Send Clock In
Send Data
Sync Select
Encoder Enable
Serial Data In
Bipolar One Out
Output Inhibit
Bipolar Zero Out
6 Out
Master Reset
Valid Word
Encoder Shift Clock
Take Data
Serial Data Out
Decoder Clock
Bipolar Zero In
Bipolar One In
Unipolar Data In
Decoder Shift Clock
Command/Data Sync
Decoder Reset
V
SS
Figure 1: Pin Assignments
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
ACT15530
(24-Pin DIP/Flat Package – See Figure 18 for LCC Pkg)
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