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參數(shù)資料
| 型號： | ACH16540DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | JT 13C 13#22D PIN WALL RECP |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, INVERTED OUTPUT, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153ED, SOT-362-1, TSSOP2-48 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 97K |
| 代理商： | ACH16540DGG |
Philips Semiconductors
Product specification
74ALVCH16540
16-bit buffer/line driver, inverting,
5V input tolerant (3-State)
1997 Aug 11
8
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
V
CC
R
L
=500
SWITCH POSITION
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
SWITCH
Open
2
V
CC
GND
Test Circuit for 3-State Outputs
Open
GND
S
1
2
V
CC
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
=Termination resistance should be equal to Z
OUT
of pulse generators.
V
CC
2.7V
2.7 – 3.6V
V
IN
V
CC
2.7V
SW00047
R
L
=500
Waveform 6. Load circuitry for switching times
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ACH16540DL | 2.5V/3.3V 16-bit buffer/line driver, inverting, 5V input tolerant 3-State |
| ACH16543DGG | JT 13C 13#22D PIN PLUG |
| ACH16646DGG | JT 13C 13#22D PIN PLUG |
| ACH16652DGG | 16-bit transceiver/register with dual enable; 3-state |
| ACH16821DGG | 20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ACH16540DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2.5V/3.3V 16-bit buffer/line driver, inverting, 5V input tolerant 3-State |
| ACH16543DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit D-type registered transceiver; 3-state |
| ACH16646DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit bus transceiver/register 3-State |
| ACH16652DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit transceiver/register with dual enable; 3-state |
| ACH16821DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State |
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