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參數(shù)資料
| 型號(hào)： | ACE9040 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Audio Processor Advance Information |
| 中文描述： | 音頻處理器進(jìn)展信息 |
| 文件頁數(shù)： | 27/33頁 |
| 文件大?。?/td> | 335K |
| 代理商： | ACE9040 |
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27
ACE9040
OP-AMP Reference Current
Reference currents for all the internal op-amps are set by
an external resistor connected from pin RREF to ground (V
).
Nominal values are 100 k
for V
= 4·85 V and 68 k
for
V
= 3·75 V. A stable discrete resistor should be used to
ensure consistent operation over a wide temperature range.
Power Supply Comparator - Reset Output
A power supply comparator is provided to give a reset at
power-on and enable the system controller to initiate a clean
shut-down sequence if the battery voltage falls too low. When
V
is below a band-gap derived threshold the open-drain
outut pin LVN drives to a logic low. This occurs for V
exceeding 1 V but less than a typical threshold of 3·35 V. An
external resistor at LVN provides a pull-up to V
with a
capacitor to ground (V
) to give a power-on reset delay.
Typical values for RC are 220 k
and 150 nF. This RC
combination also removes short transients or noise pulses
from the signal at LVN during power up. If this comparator is
not required the bandgap and comparator can be powered
down by setting bit PDLVC in the “Initializing mode 0” control
message to a “1”.
Serial Data Clock
All switched capacitor filter switching clocks are derived
from the serial data clock SCLK which must be fixed at
1·008 MHz to ensure correct frequency responses.
AMPLIFIER
An uncommitted op-amp is provided with its non-inverting
input internally connected to VMID, inverting input at pin AMPI
and output at pin AMPO.
pins TXC and RXC respectively, to give d.c. voltages corre-
sponding to the signal levels.
A switch HFS with its output at pin HF can be internally
toggled between TXC and RXC to allow measurement of the
two levels at these pins by an external level sensing circuit
such as an analog to digital converter input of ACE9030. The
HFS switch is controlled by bit HFS in the “Handsfree mode”
control message.
The system controller after comparison of the voltage
levels at TXC and RXC pins can attenuate the weaker signal
path by up to 49 dB, in 7 dB steps using blocks HFGAIN for
transmit and HFATTEN for receive. Bits THF[2:0] and
RHF[2:0] in the “Handsfree mode” control message are used
to set the gains of HFGAIN and HFATTEN respectively. The
rate of change of gain should be limited in the system control-
ler to allow normal conversation.
Attack and decay time constants are set by the resistance
and capacitance on the TXC and RXC pins. With the internal
resistor to ground of approximately 500 k
and an external
capacitor to ground of 68 nF the normal attack time of 1 ms
and decay time of 35 ms is achieved. By adding a parallel
resistor the ratio of attack to decay time can be altered.
To save power in a hand portable when handsfree opera-
tion is not needed, the transmit and receive signal rectifiers
can be switched off by setting bit HFP in the “Handsfree mode”
control message to “0”.
BIASES AND REFERENCES
BIAS, VMID and MICBIAS
Within ACE9040 most signals are single ended and swing
either side of a mid-supply reference voltage. These internal
references are all labelled VMIDxx in this data sheet.
A low impedance voltage source at mid-supply for use as
an external signal ground is available on pin BIAS. This is a
buffered copy of the voltage at pin DEC which is from an
internal high impedance potential divider between V
and
V
. The DEC pin should be decoupled to ground with a
capacitor of greater than 3.3
μ
F. Two additional buffers pro-
vide copies of DEC’s voltage at pins VMIDTX and VMIDRX,
these are used as internal signal grounds for the transmit and
receive paths respectively. VMIDTX and VMIDRX pins should
be decoupled to GND with 82 nF capacitors. By using
separate mid-supply signal grounds crosstalk due to the
compander time constant circuits and the speech and tone
signals are kept to a minimum.
Pin MICBIAS gives the bias needed for an electret micro-
phone nominally 0·8 times V
DD
, e.g. when V
DD
is 3·75 V
MICBIAS = 3 V
Fig. 16 Bias Circuits
3.3
μ
F
100k
/
68k
*
*VDD = 3.75V
DEC
BIAS
RREF
MICBIAS
BGAP
10nF
2
6
5
64
44
VMIDRX
VMIDTX
B
G
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| ACE9050 | System Controller and Data Modem Advance Information |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ACE9040IGFP1N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
| ACE9040IGFP1R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
| ACE9040IGFP2N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
| ACE9040IGFP2R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:RF/Baseband Circuit |
| ACE9040J/IW/FP1Q | 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: 制造商:ZARLINK 功能描述: |
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