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參數(shù)資料
| 型號(hào)： | ACD2200S8 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 302K |
| 代理商： | ACD2200S8 |
6
Register Programming with Serial Data
Programable reference dividers (RF1 and RF2 Counters)
If the control bits are 00 or 01 (00 for RF2 and 01 for RF1) data is transfered from the 22-bit shift register into
a latch which sets the 15-bit R Counter. Serial data format is shown below.
15-BIT Programable Reference Dividers (RF1 and RF2 Counters)
MSB
LSB
Notes:
Divide ratios less than 3 are prohibited.
Data is shifted in MSB first
Divide Ratio: 3 to 32767
Programmable N Dividers (RF1 and RF2 Counters)
Each N divider consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B
counter). If the Control Bits are 10 to 11 (10 for RF2 counter and 11 for RF1 counter) data is tranferred from
22-bit shift register into a 7-bit latch (which sets the Swallow (A) Counter) and an 11-bit latch (which sets the
11-bit programmable (B) Counter), MSB first. Serial data format is shown below.
MSB
LSB
7-bit Swallow Counter Divide Ratio (A Counter)
!
!
!
!
!
!
!
Notes:
Divide Ratio: 0 to 127.
B > A
A < P
!
"
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