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參數(shù)資料
| 型號： | AAT2505IWP-AQ-T1 |
| 廠商： | Advanced Analogic Technologies, Inc. |
| 英文描述： | Dual Channel, Step-Down Converter/Linear Regulator |
| 中文描述： | 雙通道，降壓轉(zhuǎn)換器/線性穩(wěn)壓器 |
| 文件頁數(shù)： | 16/26頁 |
| 文件大小： | 854K |
| 代理商： | AAT2505IWP-AQ-T1 |
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AAT2505
Dual Channel, Step-Down
Converter/Linear Regulator
16
2505.2006.06.1.1
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current.
for V
IN
= 2 x V
OBUCK
The term
input voltage ripple and input capacitor RMS cur-
rent equations and is a maximum when V
OBUCK
is
twice V
IN
. This is why the input voltage ripple and
the input capacitor RMS current ripple are a maxi-
mum at 50% duty cycle.
appears in both the
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT2505. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
stray inductance, the capacitor should be placed as
closely as possible to the IC. This keeps the high
frequency content of the input current localized,
minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C2)
can be seen in the evaluation board layout in
Figure 3.
A laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires, along with the low-ESR
ceramic input capacitor, can create a high Q net-
work that may affect converter performance. This
problem often becomes apparent in the form of
excessive ringing in the output voltage during load
transients. Errors in the loop phase and gain
measurements can also result.
Since the inductance of a short PCB trace feeding
the input voltage is significantly lower than the
power leads from the bench power supply, most
applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not affect the converter performance, a high ESR
tantalum or aluminum electrolytic should be placed
in parallel with the low ESR, ESL bypass ceramic.
This dampens the high Q network and stabilizes
the system.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7μF to 10μF X5R or X7R ceramic capacitor pro-
vides sufficient bulk capacitance to stabilize the
output during large load transitions and has the
ESR and ESL characteristics necessary for low
output ripple.
-
V
IN
V
OBUCK
V
OBUCK
V
IN
I
OBUCK
2
RMS(MAX)
I
=
· 1
-
= D
· (1 - D) = 0.5
2
=
V
IN
V
OBUCK
V
IN
1
2
Figure 3: AAT2505 Evaluation Board Top Side.
Figure 4: AAT2505 Evaluation Board
Bottom Side.
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