
AAT1239-1
40V Step-Up Converter for 4 to 10 White LEDs
SwitchReg
TM
PRODUCT DATASHEET
18
1239-1.2007.10.1.0
w w w . a n a l o g i c t e c h . c o m
Selecting the Boost Capacitors
The high output ripple inherent in the boost converter
necessitates low impedance output filtering.
Multi-layer ceramic (MLC) capacitors provide small size
and adequate capacitance, low parasitic equivalent
series resistance (ESR) and equivalent series inductance
(ESL), and are well suited for use with the AAT1239-1
boost regulator. MLC capacitors of type X7R or X5R are
recommended to ensure good capacitance stability over
the full operating temperature range.
The output capacitor is sized to maintain the output load
without significant voltage droop (
Δ
V
OUT
) during the
power switch ON interval, when the output diode is not
conducting. A ceramic output capacitor from 2.2
μ
F to
4.7
μ
F is recommended (see Table 5). Typically, 50V
rated capacitors are required for the 40V maximum
boost output. Ceramic capacitors sized as small as 0805
or 1206 are available which meet these requirements.
MLC capacitors exhibit significant capacitance reduction
with applied voltage. Output ripple measurements should
confirm that output voltage droop and operating stability
are acceptable. Voltage derating can minimize this fac-
tor, but results may vary with package size and among
specific manufacturers.
Output capacitor size can be estimated at a switching
frequency (F
S
) of 500kHz (worst case).
I
OUT
· D
MAX
F
S
·
Δ
V
OUT
C
OUT
=
To maintain stable operation at full load, the output
capacitor should be sized to maintain
Δ
V
OUT
between
100mV and 200mV.
The boost converter input current flows during both ON
and OFF switching intervals. The input ripple current is
less than the output ripple and, as a result, less input
capacitance is required.
PCB Layout Guidelines
Boost converter performance can be adversely affected
by poor layout. Possible impact includes high input and
output voltage ripple, poor EMI performance, and
reduced operating efficiency. Every attempt should be
made to optimize the layout in order to minimize para-
sitic PCB effects (stray resistance, capacitance, and
inductance) and EMI coupling from the high frequency
SW node. A suggested PCB layout for the AAT1239-1
boost converter is shown in Figures 9 and 10. The follow-
ing PCB layout guidelines should be considered:
1. Minimize the distance from Capacitor C1 and C2
negative terminal to the PGND pins. This is espe-
cially true with output capacitor C2, which conducts
high ripple current from the output diode back to the
PGND pins.
2. Minimize the distance between L1 to DS1 and switch-
ing pin SW; minimize the size of the PCB area con-
nected to the SW pin.
3. Maintain a ground plane and connect to the IC PGND
pin(s) as well as the GND terminals of C1 and C2.
4. Consider additional PCB area on DS1 cathode to
maximize heatsinking capability. This may be neces-
sary when using a diode with a high V
F
and/or ther-
mal resistance.
5. To avoid problems at startup, add a 10k
Ω
resistor
between the VIN, VP and EN/SET pins (R4). This is
critical in applications requiring immunity from input
noise during “hot plug” events, e.g. when plugged
into an active USB port.
Manufacturer Part Number
Murata
Murata
Murata
Murata
Murata
Value (
μ
F)
2.2
2.2
2.2
2.2
4.7
Voltage Rating
6.3
10
25
50
50
Temp Co
X5R
X5R
X7R
X7R
X7R
Case Size
0603
0603
0805
1206
1206
GRM188R60J225KE19
GRM188R61A225KE34
GRM21BR71E225KA73L
GRM31CR71H225KA88
GRM31CR71H475K
Table 5: Recommended Ceramic Capacitors.