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參數(shù)資料
| 型號(hào)： | a8251 |
| 廠商： | Altera Corporation |
| 英文描述： | Programmable Communications Interface(可編程通信接口) |
| 中文描述： | 可編程通信接口（可編程通信接口） |
| 文件頁數(shù)： | 17/21頁 |
| 文件大小： | 338K |
| 代理商： | A8251 |
Altera Corporation
41
a8251 Programmable Communications Interface Data Sheet
Synchronization may occur either externally or internally. When external
sync detect is selected, the synchronization process is as follows:
1.
The microprocessor issues an enter hunt (
eh
) command to the
command instruction register.
2.
The external sync detect circuitry forces the
extsyncd
signal high
for at least one
nrxc
cycle. The
extsyncd
is sampled on the falling
edge of
nrxc
, which forces the
a8251
to stop looking for sync
characters. At this point, the
a8251
begins sampling
rxd
on the next
rising edge of
nrxc
.
The
syn_brk
signal and corresponding status bit are asserted and
automatically cleared when the microprocessor reads the status data.
When internal sync detect is selected, the receiver is responsible for
detecting sync characters on the
rxd
signal. The sequence is as follows:
1.
The microprocessor issues an enter hunt (
eh
) command to the
command instruction register.
2.
The receiver section begins sampling for
rxd
on the rising edge of
nrxc
. The
rxd
input data is compared to the sync character(s).
3.
Upon detecting the sync character(s), the
a8251
begins sampling for
the
rxd
signal on the next rising edge of
nrxc
.
The
syn_brk
output and the corresponding status bit are asserted and
automatically cleared when the microprocessor reads the status data.
Parity and overrun errors are detected as in asynchronous operation.
Synchronous operation continues until the microprocessor issues another
enter hunt (
eh
) command.
Transmitter Operation (Synchronous)
A transmitter operation starts when the microprocessor writes the first
character (usually a sync character) to the TBR. Once the
ncts
signal is
asserted, the
a8251
begins shifting the data byte out on the falling edge
of the
ntxc
signal. Data transmission is synchronous to the
ntxc
clock.
As in asynchronous operation, a parity bit is added to each data byte to
determine the parity. See
Figure 8
.
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