- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378264 > A80960JD-66 (INTEL CORP) 3.3 V EMBEDDED 32-BIT MICROPROCESSOR PDF資料下載
參數(shù)資料
| 型號： | A80960JD-66 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 3.3 V EMBEDDED 32-BIT MICROPROCESSOR |
| 中文描述： | 32-BIT, 66 MHz, RISC PROCESSOR, CPGA132 |
| 封裝： | PGA-132 |
| 文件頁數(shù)： | 1/78頁 |
| 文件大?。?/td> | 835K |
| 代理商： | A80960JD-66 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁
80960JA/JF/JD/JT 3.3 V EMBEDDED
32-BIT MICROPROCESSOR
Advance Information Datasheet
Product Features
I
Pin/Code Compatible with all 80960Jx
Processors
I
High-Performance Embedded Architecture
—One Instruction/Clock Execution
—Core Clock Rate is:
80960JA/JF 1x the Bus Clock
80960JD 2x the Bus Clock
80960JT 3x the Bus Clock
—Load/Store Programming Model
—Sixteen 32-Bit Global Registers
—Sixteen 32-Bit Local Registers (8 sets)
—Nine Addressing Modes
—User/Supervisor Protection Model
I
Two-Way Set Associative Instruction
Cache
—80960JA - 2 Kbyte
—80960JF/JD - 4 Kbyte
—80960JT - 16 Kbyte
—Programmable Cache-Locking
Mechanism
I
Direct Mapped Data Cache
—80960JA - 1 Kbyte
—80960JF/JD - 2 Kbyte
—80960JT - 4 Kbyte
—Write Through Operation
I
On-Chip Stack Frame Cache
—Seven Register Sets Can Be Saved
—Automatic Allocation on Call/Return
—0-7 Frames Reserved for High-Priority
Interrupts
I
On-Chip Data RAM
—1 Kbyte Critical Variable Storage
—Single-Cycle Access
I
3.3 V Supply Voltage
—5 V Tolerant Inputs
—TTL Compatible Outputs
I
High Bandwidth Burst Bus
—32-Bit Multiplexed Address/Data
—Programmable Memory Configuration
—Selectable 8-, 16-, 32-Bit Bus Widths
—Supports Unaligned Accesses
—Big or Little Endian Byte Ordering
I
High-Speed Interrupt Controller
—31 Programmable Priorities
—Eight Maskable Pins plus NMI
—Up to 240 Vectors in Expanded Mode
I
Two On-Chip Timers
—Independent 32-Bit Counting
—Clock Prescaling by 1, 2, 4 or 8
—lnternal Interrupt Sources
I
Halt Mode for Low Power
I
IEEE 1149.1 (JTAG) Boundary Scan
Compatibility
I
Packages
—132-Lead Pin Grid Array (PGA)
—132-Lead Plastic Quad Flat Pack
(PQFP)
—196-Ball Mini Plastic Ball Grid Array
(MPBGA)
Order Number: 273159-001
March, 1998
Notice:
This document contains information on products in the sampling and initial production
phases of development. The specifications are subject to change without notice. Verify with your
local Intel sales office that you have the latest datasheet before finalizing a design.
相關PDF資料 |
PDF描述 |
|---|---|
| A80960HT60 | 80960HA/HD/HT 32-Bit High-Performance Superscalar Processor |
| A80960JF-16 | EMBEDDED 32-BIT MICROPROCESSOR |
| A80960JF-25 | EMBEDDED 32-BIT MICROPROCESSOR |
| A80960JT-75 | EMBEDDED 32-BIT MICROPROCESSOR |
| A80960JT-100 | EMBEDDED 32-BIT MICROPROCESSOR |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| A80960JF-16 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:EMBEDDED 32-BIT MICROPROCESSOR |
| A80960JF-25 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:EMBEDDED 32-BIT MICROPROCESSOR |
| A80960JF33 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| A80960JF-33 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:EMBEDDED 32-BIT MICROPROCESSOR |
| A80960JF3V25 | 功能描述:IC MPU I960JF 3.3V 25MHZ 132-PGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標準包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點:- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應商設備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
發(fā)布緊急采購，3分鐘左右您將得到回復。