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參數(shù)資料
| 型號： | A6810ELW |
| 廠商： | Allegro MicroSystems, Inc. |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS |
| 中文描述： | 達比奇第四，10位串行輸入，鎖存源極驅(qū)動器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 115K |
| 代理商： | A6810ELW |
DABiC-IV, 10-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
A6810xA
D
2
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25
°
C
Logic Supply Voltage, V
DD
...................
7.0 V
Driver Supply Voltage, V
BB
...................
60 V
Continuous Output Current Range,
I
OUT
.........................
-40 mA to +15 mA
Input Voltage Range,
V
IN
.......................
-0.3 V to V
DD
+ 0.3 V
Package Power Dissipation,
P
D
........................................
See Graph
Operating Temperature Range, T
A
(Suffix ‘E–’) ..................
-40
°
C to +85
°
C
(Suffix ‘S–’) ..................
-20
°
C to +85
°
C
Storage Temperature Range,
T
S
...............................
-55
°
C to +125
°
C
Caution: These CMOS devices have input
static protection (Class 2) but are still
susceptible to damage if exposed to
extremely high static electrical charges.
The A6810– devices combine 10-bit CMOS shift registers, accom-
panying data latches and control circuitry with bipolar sourcing outputs
and pnp active pull downs. Designed primarily to drive vacuum-
fluorescent displays, the 60 V and -40 mA output ratings also allow
these devices to be used in many other peripheral power driver applica-
tions. The A6810– feature an increased data input rate (compared with
the older UCN/UCQ5810-F) and a controlled output slew rate.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 3.3 V or 5 V logic supply,
serial-data input rates of at least 10 MHz .
A CMOS serial data output permits cascade connections in applica-
tions requiring additional drive lines. Similar devices are available as
the A6812– (20 bits) and A6818– (32 bits).
The A6810– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electro-
magnetic noise, which is an important consideration in systems that
include telecommunications and/or microprocessors and to meet
government emissions regulations. For inter-digit blanking, all output
drivers can be disabled and all sink drivers turned on with a BLANK-
ING input high. The pnp active pull-downs will sink at least
2.5 mA.
The A6810– are available in two temperature ranges for optimum
performance in commercial (suffix S-) or industrial (suffix E-) applica-
tions. They are provided in two package styles for through-hole DIP
(suffix -A) or minimum-area surface-mount SOIC (suffix -LW).
Copper lead frames, low logic-power dissipation, and low output-
saturation voltages allow all devices to source 25 mA from all outputs
continuously over the maximum operating temperature range.
FEATURES
I
Controlled Output Slew Rate
I
High-Speed Data Storage
I
60 V Minimum
Output Breakdown
I
High Data Input Rate
I
PNP Active Pull-Downs
I
Low Output-Saturation Voltages
I
Low-Power CMOS Logic
and Latches
Complete part number includes a suffix to identify operating
temperature range (E- or S-) and package type (-A or -LW). Always
order by complete part number, e.g.,
A6810SLW
.
6810
I
Improved Replacements
for TL4810–, UCN5810–,
and UCQ5810–
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
SERIAL
DATA OUT
LOAD
SUPPLY
SERIAL
DATA IN
BLANKING
LOGIC
SUPPLY
STROBE
GROUND
CLOCK
CLK
V
ST
BLNK
DD
BB
V
OUT
9
OUT
10
OUT
1
OUT
2
OUT
3
Dwg. PP-029
OUT
8
OUT
7
OUT
6
OUT
5
OUT
4
1
LATCHES
REGISTER
REGISTER
LATCHES
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