參數(shù)資料
型號: A67L9318E-2.8
廠商: AMIC Technology Corporation
英文描述: 512K X 18, 256K X 36 LVTTL, Pipelined ZeBL SRAM
中文描述: 為512k × 18,256 × 36 LVTTL,流水線ZeBL的SRAM
文件頁數(shù): 14/18頁
文件大小: 255K
代理商: A67L9318E-2.8
A67L9318/A67L8336
PRELIMINARY
(July, 2005, Version 0.0)
14
AMIC Technology, Corp.
SLEEP Mode
SLEEP Mode is a low current “Power-down” mode in which
the device is deselected and current is reduced to I
SB2Z
. This
duration of SLEEP Mode is dictated by the length of time the
ZZ is in a HIGH state. After entering SLEEP Mode, all inputs
except ZZ become disabled and all outputs go to High-Z.
The ZZ pin is asynchronous, active high input that causes the
device to enter SLEEP Mode. When the ZZ pin becomes
logic HIGH, ISB2Z is guaranteed after the time t
ZZI
is met.
SLEEP Mode Electrical Characteristics
(VCC, VCCQ = +3.3V
±
5%)
Any operation pending when entering SLEEP Mode is not
guaranteed to successfully complete. Therefore, SLEEP
Mode (READ or WRITE) must not be initiated until valid
pending operations are completed. Similarly, when exiting
SLEEP Mode during t
RZZ
, only a DESELECT or READ cycle
should be given while the SRAM is transitioning out of
SLEEP Mode.
Symbol
Parameter
Conditions
Min.
Max.
Unit
Note
I
SB2Z
Current during SLEEP Mode
ZZ
V
IH
-
60
mA
t
ZZ
ZZ active to input ignored
0
2(t
KHKH
)
ns
1
t
RZZ
ZZ inactive to input sampled
0
2(t
KHKH
)
ns
1
t
ZZI
ZZ active to snooze current
-
2(t
KHKH
)
ns
1
t
RZZI
ZZ inactive to exit snooze current
0
ns
1
Note : 1. This parameter is sampled.
SLEEP Mode Waveform
t
RZZ
t
ZZ
t
ZZI
I
ISB2Z
High-Z
DESELECT or READ Only
Output
(Q)
ALL INPUTS
(except ZZ)
I
SUPPLY
ZZ
CLK
: Don't Care
t
RZZI
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