參數(shù)資料
型號(hào): A67L8316
廠商: AMIC Technology Corporation
英文描述: 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM
中文描述: 256 × 16/18,128K的X 32/36 LVTTL,管線數(shù)據(jù)庫管理員的SRAM
文件頁數(shù): 15/19頁
文件大?。?/td> 272K
代理商: A67L8316
A67L8316/A67L8318/
A67L7332/A67L7336 Series
PRELIMINARY (December, 1999, Version 0.1)
14
AMIC Technology, Inc.
SLEEP Mode
SLEEP Mode is a low current “Power-down” mode in
which the device is deselected and current is reduced to
I
SB2Z
. This duration of SLEEP Mode is dictated by the
length of time the ZZ is in a HIGH state. After entering
SLEEP Mode, all inputs except ZZ become disabled and
all outputs go to High-Z.
The ZZ pin is asynchronous, active high input that causes
the device to enter SLEEP Mode. When the ZZ pin
SLEEP Mode Electrical Characteristics
(VCC, VCCQ = +3.3V
±
5%)
becomes logic HIGH, ISB2Z is guaranteed after the time
t
ZZI
is met, Any operation pending when entering SLEEP
Mode is not guaranteed to successfully complete.
Therefore, SLEEP Mode (READ or WRITE) must not be
initiated until valid pending operations are completed.
Similarly, when exiting SLEEP Mode during t
RZZ
, only a
DESELECT or READ cycle should be given while the
SRAM is transitioning out of SLEEP Mode.
Symbol
Parameter
Conditions
Min.
Max.
Unit
Note
I
SB2Z
Current during SLEEP Mode
ZZ
V
IH
-
10
mA
t
ZZ
ZZ active to input ignored
0
2(t
KHKH
)
ns
1
t
RZZ
ZZ inactive to input sampled
0
2(t
KHKH
)
ns
1
t
ZZI
ZZ active to snooze current
-
2(t
KHKH
)
ns
1
t
RZZI
ZZ inactive to exit snooze current
0
ns
1
Note : 1. This parameter is sampled.
SLEEP Mode Waveform
t
RZZ
t
ZZ
t
ZZI
I
ISB2Z
High-Z
DESELECT or READ Only
Output
(Q)
ALL INPUTS
(except ZZ)
I
SUPPLY
ZZ
CLK
: Don't Care
t
RZZI
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A67L8318E-45 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM
A67L8318E-5 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM
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