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參數(shù)資料
| 型號： | A67L0636E-2.6 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 2M X 18, 1M X 36 LVTTL, Pipelined ZeBL SRAM |
| 中文描述： | 2米x 18，100萬米鼠36 LVTTL，流水線ZeBL的SRAM |
| 文件頁數(shù)： | 7/18頁 |
| 文件大小： | 253K |
| 代理商： | A67L0636E-2.6 |
A67L1618/A67L0636 Series
PRELIMINARY (March, 2005, Version 0.1)
7
AMIC Technology, Corp.
Pin Description (continued)
Pin No.
Symbol
Description
LQFP (X18)
LQFP (X36)
64
64
ZZ
Snooze Enable : This active high asynchronous input causes the
device to enter a low-power standby mode in which all data in the
memory array is retained. When active, all other inputs are
ignored.
88
88
R/
W
Read/Write : This active input determines the cycle type when
ADV/
LD
is LOW. This is the only means for determining READs
and WRITEs. READ cycles may not be converted into WRITEs
(and vice versa) other than by loading a new address. A LOW on
this pin permits BYTE WRITE operations and must meet the setup
and hold times around the rising edge of CLK. Full bus width
WRITEs occur if all byte write enables are LOW.
74, 73, 72, 69, 68,
63, 62, 59, 58,
24, 23, 22, 19, 18
13, 12, 9, 8
51, 52, 53, 56, 57,
58, 59, 62, 63
68, 69, 72, 73, 74,
75, 78, 79, 80
1, 2, 3, 6, 7, 8, 9,
12, 13,
18, 19, 22, 23, 24,
25, 28, 29, 30
I/Oa
I/Ob
I/Oc
I/Od
SRAM Data I/O : Byte “a” is I/Oa pins; Byte “b” is I/Ob pins; Byte
“c” is I/Oc pins; Byte “d” is I/Od pins. Input data must meet setup
and hold times around CLK rising edge.
31
31
MODE
Mode : This input selects the burst sequence. A LOW on this pin
selects linear burst. NC or HIGH on this pin selects interleaved
burst. Do not alter input state while device is operating.
1, 2, 3, 6, 7, 25, 28,
29, 30, 38, 39, 42,
51, 52, 53, 56, 57,
75, 78, 79, 95, 96
38,39,42
NC
No Connect : These pins can be left floating or connected to GND
to minimize thermal impedance.
15, 41, 65, 91
15, 41, 65, 91
VCC
Power Supply : See DC Electrical Characteristics and Operating
Conditions for range.
14, 16, 66
14, 16, 66
VCC
These pins do not have to be connected directly to VCC as long
as the input voltage is
≥
V
IH
. This input is not connected to VCC
bus internally.
4, 11, 20, 27,
54, 61, 70, 77
4, 11, 20, 27, 54,
61, 70, 77
VCCQ
Isolated Output Buffer Supply : See DC Electrical Characteristics
and Operating Conditions for range.
17, 40, 90
17, 40, 90
VSS
Ground : GND.
5,10,21,26,
55,60,71,76
5,10,21,26,
55,60,71,76
VSSQ
Isolated Output Buffer Ground
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| A67L0636E-3.2 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 18, 1M X 36 LVTTL, Pipelined ZeBL SRAM |
| A67L0636E-3.2F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 18, 1M X 36 LVTTL, Pipelined ZeBL SRAM |
| A67L0636E-3.5 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 18, 1M X 36 LVTTL, Pipelined ZeBL SRAM |
| A67L0636E-3.5F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 18, 1M X 36 LVTTL, Pipelined ZeBL SRAM |
| A67L0636E-3.8 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:2M X 18, 1M X 36 LVTTL, Pipelined ZeBL SRAM |
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