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參數(shù)資料
| 型號(hào)： | A65H73361P-7 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| 中文描述： | 128K的× 36 |
| 文件頁(yè)數(shù)： | 4/21頁(yè) |
| 文件大?。?/td> | 530K |
| 代理商： | A65H73361P-7 |
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A65H73361/A65H83181 Series
PRELIMINARY
(February, 1999, Version 2.0)
3
AMIC Technology, Inc.
Block Diagram
128Kx36
or
256Kx18
Array
DQ0 - DQ35
Column Decoder
Read/Write Amp
R
Write
Buffer
2:1 MUX
2
M
WR Add
Register
Data Out
Registor
RD Add
Register
SW
Register
SBW
Register
SW
Register
SBW
Register
SA0-SA17
CK
Latch
SS
ZZ
SW
SBW
Latch
SS
Register
SS
Register
G
Pin Description
SA0-SA17
Address input
(X18 : SA0 - SA17, X36 : SA0 - SA16)
G
Asynchronous output enable
DQ0-DQ35
Data I/O
(X18 : DQ0 - DQ17, X36 : DQ0 - DQ35)
SS
Synchronous select
CK
,
CK
Differential input register clocks
M1, M2
For boundary scan purpose
SW
Write enable. Global
V
REP
(2)
HSTL input reference voltage
SBWa
Write enable. Byte a (DQ0-DQ8)
V
DD
Power supply (+3.3V)
SBWb
Write enable. Byte b (DQ9-DQ17)
V
SS
Ground
SBWc
Write enable. Byte c (DQ18-DQ26)
V
DDQ
Output power supply
SBWd
Write enable. Byte d (DQ27-DQ35)
ZZ
Asynchronous sleep mode
TMS, TDI, TCK
IEEE 1149.1 test inputs(LVTTL levels)
ZQ
Output driver impedance control
TDO
IEEE 1149.1 test output(LVTTL level)
NC
No connect
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A65H83181 | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-5 | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-6 | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-7 | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H73361SERIES | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A65H73361SERIES | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-5 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-6 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-7 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
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