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參數(shù)資料
| 型號(hào)： | A6595KLW |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | 8-BIT SERIAL-INPUT, DMOS POWER DRIVER |
| 中文描述： | 8位串行輸入，DMOS功率驅(qū)動(dòng) |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 167K |
| 代理商： | A6595KLW |
D
2
8-BIT SERIAL-INPUT,
DMOS POWER DRIVER
The A6595KA and A6595KLW combine an 8-bit CMOS shift
register and accompanying data latches, control circuitry, and DMOS
power driver outputs. Power driver applications include relays, sole-
noids, and other medium-current or high-voltage peripheral power
loads.
The serial-data input, CMOS shift register and latches allow direct
interfacing with microprocessor-based systems. Serial-data input rates
are over 5 MHz. Use with TTL may require appropriate pull-up
resistors to ensure an input logic high.
A CMOS serial-data output enables cascade connections in appli-
cations requiring additional drive lines. Similar devices with reduced
r
DS(on)
are available as the A6A595.
The A6595 DMOS open-drain outputs are capable of sinking up to
750 mA. All of the output drivers are disabled (the DMOS sink drivers
turned off) by the OUTPUT ENABLE input high.
The A6595KA is furnished in a 20-pin dual in-line plastic package.
The A6595KLW is furnished in a wide-body, small-outline plastic
package (SOIC) with gull-wing leads. Copper lead frames, reduced
supply current requirements, and low on-state resistance allow both
devices to sink 150 mA from all outputs continuously, to ambient
temperatures over 85
°
C.
FEATURES
I
50 V Minimum Output Clamp Voltage
I
250 mA Output Current (all outputs simultaneously)
I
1.3
Typical
r
DS(on)
I
Low Power Consumption
I
Replacements for TPIC6595N and TPIC6595DW
6595
ADVANCE INFORMATION
(Subject to change without notice)
January 24, 2000
LOGIC
GROUND
1
2
3
8
9
13
14
15
16
17
19
4
5
6
7
12
18
20
SERIAL
DATA OUT
SERIAL
DATA IN
LOGIC
SUPPLY
V
DD
STROBE
POWER
GROUND
CLOCK
CLK
ST
OUT
7
OUT
6
OUT
5
Dwg. PP-029-13
OUT
0
OUT
1
OUT
2
OUT
3
OUT
4
10
11
POWER
GROUND
POWER
GROUND
OUTPUT
ENABLE
OE
REGISTER
CLEAR
POWER
GROUND
L
R
R
L
CLR
Note that the A6595KA (DIP) and the A6595KLW (SOIC)
are electrically identical and share a common terminal
number assignment.
Always order by complete part number:
Part Number
A6595KA
A6595KLW
Package
20-pin DIP
20-lead SOIC
R
θ
JA
55
°
C/W
70
°
C/W
R
θ
JC
25
°
C/W
17
°
C/W
ABSOLUTE MAXIMUM RATINGS
at T
A
= 25
°
C
Output Voltage, V
O
...............................
50 V
Output Drain Current,
Continuous, I
O
..........................
250 mA
*
Peak, I
OM
.................................
750 mA*
Peak, I
OM
.......................................
2.0 A
Single-Pulse Avalanche Energy,
E
AS
.................................................
75 mJ
Logic Supply Voltage, V
DD
..................
7.0 V
Input Voltage Range,
V
I
...................................
-0.3 V to +7.0 V
Package Power Dissipation,
P
D
...........................................
See Graph
Operating Temperature Range,
T
A
.................................
-40
°
C to +125
°
C
Storage Temperature Range,
T
S
.................................
-55
°
C to +150
°
C
* Each output, all outputs on.
Pulse duration
≤
100
μ
s, duty cycle
≤
2%.
Caution: These CMOS devices have input static
protection (Class 3) but are still susceptible to damage if
exposed to extremely high static electrical charges.
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