參數(shù)資料
型號: A64S06162AG-70UF
廠商: AMIC Technology Corporation
英文描述: 16M(1M x 16bit) Normal mode & Page mode with Deep Power Down Static Random Access Memory
中文描述: 1,600(100萬× 16)普通模式
文件頁數(shù): 2/14頁
文件大?。?/td> 200K
代理商: A64S06162AG-70UF
2
A64S06162A
(May, 2005, Version 0.0)
AMIC Technology, Corp.
Preliminary
MEMORY
16M(1M x 16bit) Normal mode & Page mode with Deep Power Down
Static Random Access Memory
DESCRIPTION
The A64S06162A is a 16Mb high speed, low power Static Random Access Memory(SRAM)
organized as 1,048,576 words by 16 bits and supports Deep Power Down and Page Mode.
The A64S06162A is a Pseudo SRAM based on successfully proven DRAM CELL
SRAM
which
was specifically developed for cost sensitive, low power computing and communication
applications such as mobile cellular phone handsets, personal digital assistants and other
battery-operated consumer products.
FEATURES
Standard Asynchronous SRAM Interface with Deep Power Down and Page Mode
Organization
: 1M x 16Bit
Power Supply Voltage
: 2.7 ~ 3.3 V
Page Size
: 4 words
Page Mode Access (tPAA)
: 35ns
Data Retention Voltage
: 2.4V
Deep Power Down
: 5uA
Tri-state Output and TTL Compatible
FUNCTIONAL BLOCK DIAGRAM
PRODUCT FAMILY
Memory Array
8192 rows
128 x 16 columns
R
A
Column Decoder
A
Row
Address
Column
Address
Ref. Cont.
DC Generator Circuit
Control Logic
/CS
/PD
/OE
/WE
S
W
D
IO0
IO7
IO8
IO15
/UB
/LB
Deep Power Down
/PD
Data Input / Output
IO0
IO15
Lower Byte (IO0
7)
/LB
Address Input
A0
A19
Upper Byte (IO8
15)
/UB
Write Enable Input
/WE
Ground
VSS
Output Enable Input
/OE
Power
VCC
Chip Select Input
/CS
Name
Function
Function
Name
/PD
IO0
IO2
VCC
VSS
IO6
IO7
NC
A2
/CS
IO1
IO3
IO4
IO5
/WE
A11
A1
A4
A6
A7
A16
A15
A13
A10
A0
A3
A5
A17
VSS
A14
A12
A9
/OE
/UB
IO10
IO11
IO12
IO13
A19
A8
/LB
IO8
IO9
VSS
VCC
IO14
IO15
A18
6
5
A
B
C
D
E
F
G
H
PIN DESCRIPTION
100uA
IccDR
(Max)
100uA
ISB1
(Max)
2.0mA
ICC1
(Max)
-40 ~ 85
Operating
Temperature
70
Speed
2.7 ~ 3.3 V
Voltage
Mode
Product Family
A64S06162A
Page
Note : E3 pin ( VSS) can be remain as a NC
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