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參數(shù)資料
| 型號： | A6402 |
| 元件分類： | 通信、網(wǎng)絡(luò)模塊及開發(fā)工具 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | 電信/數(shù)據(jù)通信 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 241K |
| 代理商： | A6402 |
Altera Corporation
57
a6402
Universal Asynchronous
Receiver/Transmitter
September 1996, ver. 1
Data Sheet
A-DS-A6402-01
Features
I
a6402
receiver/transmitter (UART)
Optimized for FLEX
Uses approximately 162 FLEX logic elements (LEs)
Programmable word length, stop bits, and parity
Full duplex operation
Includes status flags for parity, framing, and overrun errors
Functionally based on the Harris HD-6402 device, except as noted in
the
“Variations & Clarifications” section on page 63
MegaCore function implementing a universal asynchronous
I
I
I
I
I
I
and MAX
architectures
General
Description
The
receiver/transmitter (UART), which provides an interface between a
microprocessor and a serial communications channel. See
Figure 1
.
a6402
MegaCore function implements a universal asynchronous
Figure 1. a6402 Symbol
cls1
cls2
crl
ndrr
epe
mr
pi
rrc
rri
sbs
ntbrl
tbr[7..0]
trc
dr
fe
oe
pe
rbr[7..0]
tbre
tre
tro
A6402
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| A65-1 | Analog IC |
| A655NV400C5 | Interface IC |
| 697NV400C5 | Microprocessor Supervisory Circuits |
| 697NV400M5 | Microprocessor Supervisory Circuits |
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| A6-404-035 | 制造商:HECON / DANAHER 功能描述: 制造商:Hecon / Danaher 功能描述: |
| A6-404-041 | 制造商:HECON / DANAHER 功能描述: |
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