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參數(shù)資料
| 型號： | A62S7308BM-55S |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K X 8 BIT LOW VOLTAGE CMOS SRAM |
| 中文描述： | 128K的× 8位低電壓CMOS的SRAM |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 277K |
| 代理商： | A62S7308BM-55S |
Timing Waveforms (continued)
Read Cycle 3
(1, 3, 4, 6)
A62S7308B Series
PRELIMINARY
(March, 2001, Version 0.2)
7
AMIC Technology, Inc.
t
CLZ15
t
ACE1
t
CHZ15
CE1
D
OUT
Read Cycle 4
(1, 4, 7, 8)
t
CLZ25
t
ACE2
t
CHZ25
CE2
D
OUT
Notes: 1.
WE
is high for Read Cycle.
2. Device is continuously enabled
CE1
= V
IL
and CE2 = V
IH
.
3. Address valid prior to or coincident with
CE1
transition low.
4.
OE
= V
IL
.
5. Transition is measured
±
500mV from steady state. This parameter is sampled and not 100% tested.
6. CE2 is high.
7.
CE1
is low.
8. Address valid prior to or coincident with CE2 transition high.
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| A62S7308BM-55SI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT LOW VOLTAGE CMOS SRAM |
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