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參數(shù)資料
| 型號(hào)： | A62L256-55LL |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| 中文描述： | 32K的× 8位低電壓CMOS的SRAM |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 146K |
| 代理商： | A62L256-55LL |
A62L256 Series
Preliminary
32K X 8 BIT LOW VOLTAGE CMOS SRAM
PRELIMINARY (November, 2001, Version 1.4)
2
AMIC Technology, Inc.
Features
n
External Operating Voltage: 2.7V to 3.6V
n
Access times: 55ns (max.): for VCC = 3.0V to 3.6V
70ns (max.): for VCC = 2.7V to 3.6V
n
Current: Operating (I
CC1
): -55 series 18mA (typ.)
Standby (I
SB1
): 0.05
μ
A (typ.)
n
Extended operating temperature range: -40oC to
+85oC for -LLU series
n
Full static operation, no clock or refreshing required
n
All inputs and outputs are directly TTL-compatible
n
Common I/O using three-state output
n
Data retention voltage: 2.0V (min.)
n
Available in 28-pin DIP, SOP and TSOP (forward and
reverse type) packages
-70 series 12mA (typ.)
General Description
The A62L256 is a low operating current 262,144-bit static
random access memory organized as 32,768 words by 8
bits and operates on a low power voltage: 2.7V to 3.6V.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Minimum standby power is drawn by this device when
CE is at a high level, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 2.0V.
Product Family
Power Dissipation
Standby
(I
SB1
, Typ.)
Product Family
Operating
Temperature
VCC
Range
Speed
Data Retention
(I
CCDR
, Typ.)
Operating
(I
CC2
, Typ.)
Package
Type
A62L256
-40
°
C ~ +85
°
C
2.7V~3.6V
55ns / 70ns
0.02
μ
A
0.05
μ
A
1mA
28L DIP
28L SOP
28L TSOP
1. Typical values are measured at VCC = 3.0V, T
A
= 25
°
C and not 100% tested.
2. Data retention current VCC = 2.0V.
Pin Configurations
n
DIP
n
SOP
n
TSOP
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O
1
I/O
2
GND
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
CE
OE
A11
A9
A8
A13
WE
VCC
A10
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O
0
I/O
1
I/O
2
GND
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
CE
OE
A11
A9
A8
A13
WE
VCC
A10
A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A62L256V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A11
A9
A8
A13
WE
A14
A12
A7
A6
A5
A4
A3
I/O
6
I/O
5
I/O
4
I/O
3
VSS
I/O
2
I/O
1
I/O
0
A0
A1
A2
A10
CE
VCC
I/O
7
OE
A62L256R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A4
A5
A6
A7
A12
VCC
WE
A13
A8
A9
A11
OE
I/O
0
I/O
1
I/O
2
VSS
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
CE
A10
A2
A1
A14
A0
A3
~
~
~
~
相關(guān)PDF資料 |
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| A62L256-55LLU | 32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| A62L256-70LL | 32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| A62L256-70LLU | ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85% |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A62L256-55LLU | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| A62L256-70LL | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| A62L256-70LLU | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| A62L256M-55LL | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT LOW VOLTAGE CMOS SRAM |
| A62L256M-55LLU | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:32K X 8 BIT LOW VOLTAGE CMOS SRAM |
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