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參數(shù)資料
| 型號： | A6173081SW-15 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K X 8 BIT HIGH SPEED CMOS SRAM |
| 中文描述： | 128K的× 8位高速CMOS SRAM的 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 172K |
| 代理商： | A6173081SW-15 |
A6173081 Series
PRELIMINARY
(July, 2000, Version 0.0)
3
AMIC Technology, Inc.
Recommended DC Operating Conditions
(T
A
= 0
°
C to + 70
°
C)
Symbol
Parameter
Min.
Typ.
Max.
Unit
VCC
Supply Voltage
4.5
5.0
5.5
V
GND
Ground
0
0
0
V
V
IH
Input High Voltage
2.2
-
VCC + 0.5
V
V
IL
Input Low (1) Voltage
-0.5
0
+0.8
V
C
L
Output Load
-
-
30
pF
Absolute Maximum Ratings*
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
IN, IN/OUT Volt to GND . . . . . . . . . . -0.5V to VCC +0.5V
Operating Temperature, Topr . . . . . . . . . . . 0
°
C to +70
°
C
Storage Temperature, Tstg . . . . . . . . . . -55
°
C to +125
°
C
Temperature Under Bias, Tbias . . . . . . . . -10
°
C to +85
°
C
Power Dissipation, P
T
. . . . . . . . . . . . . . . . . . . . . . . 1.0W
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute maximum
rating conditions for extended periods may affect device
reliability.
DC Electrical Characteristics
(T
A
= 0
°
C to + 70
°
C, VCC = 5V
±
10%, GND = 0V)
Symbol
Parameter
A6173081-12
A6173081-15
Unit
Conditions
Min.
Max.
Min.
Max.
I
LI
Input Leakage
-
2
-
2
μ
A
V
IN
= GND to VCC
I
LO
Output Leakage
-
2
-
2
μ
A
CE = V
IH
, OE = V
IH
V
I/O
= GND to VCC
I
CC1
(2)
Dynamic Operating
Current
-
170
-
165
mA
CE = V
IL
, I
I/O
= 0 mA
Min. Cycle, Duty = 100%
I
SB
-
25
-
25
mA
CE = V
IH
I
SB1
Standby Power
Supply Current
-
8
-
8
mA
CE
≥
VCC - 0.2V,
V
IN
≥
VCC -0.2V or V
IN
≤
0.2V
V
OL
Output Low Voltage
-
0.4
-
0.4
V
I
OL
= 8 mA
V
OH
Output High Voltage
2.4
-
2.4
-
V
I
OH
= -4 mA
Notes: 1. V
IL
= -3.0V for pulses less than 20 ns.
2. I
CC1
is dependent on output loading, cycle rates, and Read/Write patterns.
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