Libero
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A54SX32A-BGG329I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 18/108闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA SX 48K GATES 329-BGA
妯欐簴鍖呰锛� 27
绯诲垪锛� SX-A
LAB/CLB鏁�(sh霉)锛� 2880
杓稿叆/杓稿嚭鏁�(sh霉)锛� 249
闁€鏁�(sh霉)锛� 48000
闆绘簮闆诲锛� 2.25 V ~ 5.25 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 329-BBGA
渚涙噳鍟嗚ō鍌欏皝瑁濓細 329-PBGA锛�31x31锛�
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SX-A Family FPGAs
v5.3
1-13
Design Environment
The SX-A family of FPGAs is fully supported by both Actel
Libero
Integrated
Design
Environment
(IDE)
and
Designer FPGA development software. Actel Libero IDE is
a
design
management
environment,
seamlessly
integrating design tools while guiding the user through
the design flow, managing all design and log files, and
passing necessary design data among tools. Additionally,
Libero IDE allows users to integrate both schematic and
HDL synthesis into a single flow and verify the entire
design in a single environment. Libero IDE includes
Synplify for Actel from Synplicity, ViewDraw for
Actel from Mentor Graphics, ModelSim HDL Simulator
from
Mentor
Graphics,
WaveFormer
Lite
from
SynaptiCAD, and Designer software from Actel. Refer
to the Libero IDE flow diagram for more information
(located on the Actel website).
Actel Designer software is a place-and-route tool and
provides a comprehensive suite of backend support tools
for FPGA development. The Designer software includes
timing-driven
place-and-route,
and
a
world-class
integrated static timing analyzer and constraints editor.
With the Designer software, a user can select and lock
package pins while only minimally impacting the results
of place-and-route. Additionally, the back-annotation
flow is compatible with all the major simulators and the
simulation results can be cross-probed with Silicon
Explorer II, Actel鈥檚 integrated verification and logic
analysis tool. Another tool included in the Designer
software is the SmarGen core generator, which easily
creates popular and commonly used logic functions for
implementation in your schematic or HDL design. Actel's
Designer software is compatible with the most popular
FPGA design entry and verification tools from companies
such as Mentor Graphics, Synplicity, Synopsys, and
Cadence Design Systems. The Designer software is
available for both the Windows and UNIX operating
systems.
Programming
Device programming is supported through Silicon
Sculptor series of programmers. In particular, Silicon
Sculptor
is compact, robust, single-site and multi-site
device programmer for the PC.
With standalone software, Silicon Sculptor
allows
concurrent programming of multiple units from the
same PC, ensuring the fastest programming times
possible. Each fuse is subsequently verified by Silicon
Sculptor II to insure correct programming. In addition,
integrity
tests
ensure
that
no
extra
fuses
are
programmed. Silicon Sculptor
also provides extensive
hardware self-testing capability.
The procedure for programming an SX-A device using
Silicon Sculptor is as follows:
1. Load the .AFM file
2. Select the device to be programmed
3. Begin programming
When the design is ready to go to production, Actel
offers
device
volume-programming
services
either
through
distribution
partners
or
via
in-house
programming from the factory.
For detailed information on programming, read the
following documents Programming Antifuse Devices and
鐩搁棞PDF璩囨枡
PDF鎻忚堪
A54SX32A-1BG329 IC FPGA SX 48K GATES 329-BGA
A54SX32A-BG329I IC FPGA SX 48K GATES 329-BGA
A54SX32A-1BGG329 IC FPGA SX 48K GATES 329-BGA
A54SX72A-FFG256 IC FPGA SX-A 108K 256-FBGA
A54SX72A-FFGG256 IC FPGA SX-A 108K 256-FBGA
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鍙冩暩(sh霉)鎻忚堪
A54SX32A-BGG329M 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:FPGA SX-A Family 32K Gates 1800 Cells 238MHz 0.25um Technology 2.5V 329-Pin BGA 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 329 - Trays
A54SX32A-CQ208 鍔熻兘鎻忚堪:IC FPGA SX 48K GATES 208-CQFP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳鍟嗚ō鍌欏皝瑁�:352-CQFP锛�75x75锛�
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A54SX32A-CQ208M 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:FPGA SX-A Family 32K Gates 1800 Cells 238MHz 0.25um/0.22um (CMOS) Technology 2.5V 208-Pin CQFP 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:FPGA SX-A 32K GATES 1800 CELLS 238MHZ 0.25UM/0.22UM 2.5V 208 - Trays 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:IC FPGA 48K GATES 208CQFP 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:IC FPGA 174 I/O 208CQFP
A54SX32A-CQ256 鍔熻兘鎻忚堪:IC FPGA SX 48K GATES 256-CQFP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯欐簴鍖呰:1 绯诲垪:ProASICPLUS LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:129024 杓稿叆/杓稿嚭鏁�(sh霉):248 闁€鏁�(sh霉):600000 闆绘簮闆诲:2.3 V ~ 2.7 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:- 灏佽/澶栨:352-BFCQFP锛屽付鎷夋】 渚涙噳鍟嗚ō鍌欏皝瑁�:352-CQFP锛�75x75锛�