tQCKH Input Low to High (100% Load) (Pad to R-cell Input) 1.7 1.9 2.2 2.5 3" />
參數(shù)資料
型號(hào): A54SX32A-1FGG256I
廠商: Microsemi SoC
文件頁(yè)數(shù): 73/108頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SX 48K GATES 256-FBGA
標(biāo)準(zhǔn)包裝: 90
系列: SX-A
LAB/CLB數(shù): 2880
輸入/輸出數(shù): 203
門數(shù): 48000
電源電壓: 2.25 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FPBGA(17x17)
SX-A Family FPGAs
v5.3
2-47
tQCKH
Input Low to High (100% Load)
(Pad to R-cell Input)
1.7
1.9
2.2
2.5
3.5
ns
tQCHKL
Input High to Low (100% Load)
(Pad to R-cell Input)
1.7
2
2.2
2.6
3.6
ns
tQPWH
Minimum Pulse Width High
1.5
1.7
2.0
2.3
3.2
ns
tQPWL
Minimum Pulse Width Low
1.5
1.7
2.0
2.3
3.2
ns
tQCKSW
Maximum Skew (Light Load)
0.2
0.3
0.5
ns
tQCKSW
Maximum Skew (50% Load)
0.4
0.5
0.6
0.9
ns
tQCKSW
Maximum Skew (100% Load)
0.4
0.5
0.6
0.9
ns
Table 2-37 A54SX72A Timing Characteristics (Continued)
(Worst-Case Commercial Conditions VCCA = 2.25 V, VCCI = 3.0 V, TJ = 70°C)
Parameter
Description
–3 Speed*
–2 Speed
–1 Speed
Std. Speed
–F Speed
Units
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
Note: *All –3 speed grades have been discontinued.
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