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- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗4504 > A54SX16A-FFGG144 (Microsemi SoC)IC FPGA SX 24K GATES 144-FBGA PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛�
A54SX16A-FFGG144
寤犲晢锛�
Microsemi SoC
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87/108闋�
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0K
鎻忚堪锛�
IC FPGA SX 24K GATES 144-FBGA
妯欐簴鍖呰锛�
160
绯诲垪锛�
SX-A
LAB/CLB鏁�(sh霉)锛�
1452
杓稿叆/杓稿嚭鏁�(sh霉)锛�
111
闁€鏁�(sh霉)锛�
24000
闆绘簮闆诲锛�
2.25 V ~ 5.25 V
瀹夎椤炲瀷锛�
琛ㄩ潰璨艰
宸ヤ綔婧害锛�
0°C ~ 70°C
灏佽/澶栨锛�
144-LBGA
渚涙噳鍟嗚ō鍌欏皝瑁濓細
144-FPBGA锛�13x13锛�
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SX-A Family FPGAs1- 4v5.3Figure 1-5 DirectConnect and FastConnect for Type 1 SuperClustersFigure 1-6 DirectConnect and FastConnect for Type 2 SuperClustersDirectConnect No Antifuses 0.1 ns Maximum Routing DelayFastConnect One Antifuse 0.3 ns Maximum Routing DelayRouting Segments Typically Two Antifuses Max. Five AntifusesDirectConnect No Antifuses 0.1 ns Maximum Routing DelayFastConnect One Antifuse 0.3 ns Maximum Routing DelayRouting Segments Typically Two Antifuses Max. Five Antifuses
鐩搁棞PDF璩囨枡
PDF鎻忚堪
W25Q16BVSSIG
IC SPI FLASH 16MBIT 8SOIC
ASM28DRKH-S13
CONN EDGECARD 56POS .156 EXTEND
RSC65DRES-S734
CONN EDGECARD 130POS .100 EYELET
RMC65DRES-S734
CONN EDGECARD 130PS .100 EYELET
HSC36DRAI-S734
CONN EDGECARD 72POS .100 R/A PCB
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鍙冩暩(sh霉)鎻忚堪
A54SX16A-FFGG256
鍔熻兘鎻忚堪:IC FPGA SX 24K GATES 256-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯欐簴鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:256-FPBGA锛�17x17锛�
A54SX16A-FG144
鍔熻兘鎻忚堪:IC FPGA SX 24K GATES 144-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯欐簴鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:256-FPBGA锛�17x17锛�
A54SX16A-FG144A
鍔熻兘鎻忚堪:IC FPGA SX 24K GATES 144-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯欐簴鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:256-FPBGA锛�17x17锛�
A54SX16A-FG144I
鍔熻兘鎻忚堪:IC FPGA SX 24K GATES 144-FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯欐簴鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:256-FPBGA锛�17x17锛�
A54SX16A-FG144M
鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:FPGA SX-A 16K GATES 924 CELLS 227MHZ 0.25UM/0.22UM 2.5V 144F - Trays 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:IC FPGA 24K GATES 144FBGA 鍒堕€犲晢:Microsemi Corporation 鍔熻兘鎻忚堪:IC FPGA 111 I/O 144FBGA
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