參數(shù)資料
型號(hào)： A54SX08A-2TQ100
廠商： Microsemi SoC
文件頁(yè)數(shù)： 30/108頁(yè)
文件大?。?/td> 0K
描述： IC FPGA SX 12K GATES 100-TQFP
標(biāo)準(zhǔn)包裝： 90
系列： SX-A
LAB/CLB數(shù)： 768
輸入/輸出數(shù)： 81
門(mén)數(shù)： 12000
電源電壓： 2.25 V ~ 5.25 V
安裝類型： 表面貼裝
工作溫度： 0°C ~ 70°C
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-TQFP（14x14）
SX-A Family FPGAs
2- 8
v5.3
Power Dissipation
A critical element of system reliability is the ability of electronic devices to safely dissipate the heat generated during
operation. The thermal characteristics of a circuit depend on the device and package used, the operating temperature,
the operating current, and the system's ability to dissipate heat.
A complete power evaluation should be performed early in the design process to help identify potential heat-related
problems in the system and to prevent the system from exceeding the device’s maximum allowed junction
temperature.
The actual power dissipated by most applications is significantly lower than the power the package can dissipate.
However, a thermal analysis should be performed for all projects. To perform a power evaluation, follow these steps:
1. Estimate the power consumption of the application.
2. Calculate the maximum power allowed for the device and package.
3. Compare the estimated power and maximum power values.
Estimating Power Dissipation
The total power dissipation for the SX-A family is the sum of the DC power dissipation and the AC power dissipation:
PTotal = PDC + PAC
EQ 2-5
DC Power Dissipation
The power due to standby current is typically a small component of the overall power. An estimation of DC power
dissipation under typical conditions is given by:
PDC = IStandby * VCCA
EQ 2-6
Note: For other combinations of temperature and voltage settings, refer to the eX, SX-A and RT54SX-S Power
AC Power Dissipation
The power dissipation of the SX-A family is usually dominated by the dynamic power dissipation. Dynamic power
dissipation is a function of frequency, equivalent capacitance, and power supply voltage. The AC power dissipation is
defined as follows:
PAC = PC-cells + PR-cells + PCLKA + PCLKB + PHCLK + POutput Buffer + PInput Buffer
EQ 2-7
or:
EQ 2-8
PAC =
VCCA
2 * [(m * C
EQCM * fm)C-cells + (m * CEQSM * fm)R-cells + (n * CEQI * fn)Input Buffer + (p * (CEQO + CL) * fp)Output Buffer
+ (0.5 * (q1 * CEQCR * fq1) + (r1 * fq1))CLKA + (0.5 * (q2 * CEQCR * fq2)+ (r2 * fq2))CLKB + (0.5 * (s1 * CEQHV * fs1) +
(CEQHF * fs1))HCLK]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A54SX08A-2TQ100I 功能描述:IC FPGA SX 12K GATES 100-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17）
A54SX08A-2TQ144 功能描述:IC FPGA SX 12K GATES 144-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17）
A54SX08A-2TQ144I 功能描述:IC FPGA SX 12K GATES 144-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:SX-A 標(biāo)準(zhǔn)包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):36864 輸入/輸出數(shù):157 門(mén)數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17）
A54SX08A-2TQ208 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs
A54SX08A-2TQ208A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SX-A Family FPGAs
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