鍨嬭櫉锛� | A54SX08A-2FGG144I |
寤犲晢锛� | Microsemi SoC |
鏂囦欢闋佹暩(sh霉)锛� | 63/108闋� |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC FPGA SX 12K GATES 144-FBGA |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 160 |
绯诲垪锛� | SX-A |
LAB/CLB鏁�(sh霉)锛� | 768 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 111 |
闁€鏁�(sh霉)锛� | 12000 |
闆绘簮闆诲锛� | 2.25 V ~ 5.25 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | -40°C ~ 85°C |
灏佽/澶栨锛� | 144-LBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 144-FPBGA锛�13x13锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
---|---|
AYM30DTMT | CONN EDGECARD 60POS R/A .156 SLD |
A54SX16A-1FGG144I | IC FPGA SX 24K GATES 144-FBGA |
A54SX08A-2FG144I | IC FPGA SX 12K GATES 144-FBGA |
AGM30DTMT | CONN EDGECARD 60POS R/A .156 SLD |
A54SX16A-2FGG144 | IC FPGA SX 24K GATES 144-FBGA |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
---|---|
A54SX08A-2FGG208A | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:SX-A Family FPGAs |
A54SX08A-2FGG208I | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:SX-A Family FPGAs |
A54SX08A-2PQ208 | 鍔熻兘鎻忚堪:IC FPGA SX 12K GATES 208-PQFP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:SX-A 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�:36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A54SX08A-2PQ208A | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:SX-A Family FPGAs |
A54SX08A-2PQ208B | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:SX-A Family FPGAs |