鍨嬭櫉(h脿o)锛� | A54SX08A-1PQ208I |
寤犲晢锛� | Microsemi SoC |
鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 35/108闋�(y猫) |
鏂囦欢澶у皬锛� | 0K |
鎻忚堪锛� | IC FPGA SX 12K GATES 208-PQFP |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 24 |
绯诲垪锛� | SX-A |
LAB/CLB鏁�(sh霉)锛� | 768 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 130 |
闁€(m茅n)鏁�(sh霉)锛� | 12000 |
闆绘簮闆诲锛� | 2.25 V ~ 5.25 V |
瀹夎椤�(l猫i)鍨嬶細 | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | -40°C ~ 85°C |
灏佽/澶栨锛� | 208-BFQFP |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 208-PQFP锛�28x28锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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RMC43DRAS-S734 | CONN EDGECARD 86POS .100 R/A PCB |
A54SX08A-1PQG208I | IC FPGA SX 12K GATES 208-PQFP |
A54SX08A-2PQ208 | IC FPGA SX 12K GATES 208-PQFP |
A40MX04-1VQ80I | IC FPGA MX SGL CHIP 6K 80-VQFP |
A40MX04-1VQG80I | IC FPGA MX SGL CHIP 6K 80-VQFP |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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A54SX08A-1PQ208M | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū(ch膿ng):鏈煡寤犲 鍔熻兘鎻忚堪:SX-A Family FPGAs |
A54SX08A-1PQG208 | 鍔熻兘鎻忚堪:IC FPGA SX 12K GATES 208-PQFP RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪锛� 绯诲垪:SX-A 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€(m茅n)鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A54SX08A-1PQG208I | 鍔熻兘鎻忚堪:IC FPGA SX 12K GATES 208-PQFP RoHS:鏄� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪锛� 绯诲垪:SX-A 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€(m茅n)鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A54SX08A-1TQ100 | 鍔熻兘鎻忚堪:IC FPGA SX 12K GATES 100-TQFP RoHS:鍚� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪锛� 绯诲垪:SX-A 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€(m茅n)鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |
A54SX08A-1TQ100I | 鍔熻兘鎻忚堪:IC FPGA SX 12K GATES 100-TQFP RoHS:鍚� 椤�(l猫i)鍒�:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄e垪锛� 绯诲垪:SX-A 妯�(bi膩o)婧�(zh菙n)鍖呰:90 绯诲垪:ProASIC3 LAB/CLB鏁�(sh霉):- 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):36864 杓稿叆/杓稿嚭鏁�(sh霉):157 闁€(m茅n)鏁�(sh霉):250000 闆绘簮闆诲:1.425 V ~ 1.575 V 瀹夎椤�(l猫i)鍨�:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:256-LBGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:256-FPBGA锛�17x17锛� |