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    參數(shù)資料
    型號(hào): A54SX08-2FG144
    廠商: Microsemi SoC
    文件頁(yè)數(shù): 13/64頁(yè)
    文件大?。?/td> 0K
    描述: IC FPGA SX 12K GATES 144-FBGA
    標(biāo)準(zhǔn)包裝: 160
    系列: SX
    LAB/CLB數(shù): 768
    輸入/輸出數(shù): 111
    門數(shù): 12000
    電源電壓: 3 V ~ 3.6 V,4.75 V ~ 5.25 V
    安裝類型: 表面貼裝
    工作溫度: 0°C ~ 70°C
    封裝/外殼: 144-LBGA
    供應(yīng)商設(shè)備封裝: 144-FPBGA(13x13)
    SX Family FPGAs
    1- 16
    v3.2
    Evaluating Power in SX Devices
    A critical element of system reliability is the ability of
    electronic devices to safely dissipate the heat generated
    during operation. The thermal characteristics of a circuit
    depend on the device and package used, the operating
    temperature, the operating current, and the system's
    ability to dissipate heat.
    You should complete a power evaluation early in the
    design process to help identify potential heat-related
    problems in the system and to prevent the system from
    exceeding the device’s maximum allowed junction
    temperature.
    The actual power dissipated by most applications is
    significantly lower than the power the package can
    dissipate.
    However,
    a
    thermal
    analysis
    should
    be
    performed for all projects. To perform a power
    evaluation, follow these steps:
    1. Estimate
    the
    power
    consumption
    of
    the
    application.
    2. Calculate the maximum power allowed for the
    device and package.
    3. Compare the estimated power and maximum
    power values.
    Estimating Power Consumption
    The total power dissipation for the SX family is the sum
    of the DC power dissipation and the AC power
    dissipation. Use EQ 1-5 to calculate the estimated power
    consumption of your application.
    PTotal = PDC + PAC
    EQ 1-5
    DC Power Dissipation
    The power due to standby current is typically a small
    component of the overall power. The Standby power is
    shown
    in
    for
    commercial,
    worst-case
    conditions (70
    °C).
    The DC power dissipation is defined in EQ 1-6.
    PDC = (Istandby) × VCCA + (Istandby) × VCCR +
    (Istandby) × VCCI + xVOL × IOL + y(VCCI – VOH) × VOH
    EQ 1-6
    AC Power Dissipation
    The power dissipation of the SX Family is usually
    dominated by the dynamic power dissipation. Dynamic
    power dissipation is a function of frequency, equivalent
    capacitance, and power supply voltage. The AC power
    dissipation is defined in EQ 1-7 and EQ 1-8.
    PAC = PModule + PRCLKA Net + PRCLKB Net + PHCLK Net +
    POutput Buffer + PInput Buffer
    EQ 1-7
    PAC = VCCA
    2 × [(m × C
    EQM × fm)Module +
    (n × CEQI × fn)Input Buffer+ (p × (CEQO + CL) × fp)Output Buffer +
    (0.5 × (q1 × CEQCR × fq1) + (r1 × fq1))RCLKA +
    (0.5 × (q2 × CEQCR × fq2)+ (r2 × fq2))RCLKB +
    (0.5 × (s1 × CEQHV × fs1) + (CEQHF × fs1))HCLK]
    EQ 1-8
    Definition of Terms Used in Formula
    m
    =
    Number of logic modules switching at fm
    n
    =
    Number of input buffers switching at fn
    p
    =
    Number of output buffers switching at fp
    q1
    =
    Number of clock loads on the first routed array
    clock
    q2
    =
    Number of clock loads on the second routed array
    clock
    x
    =
    Number of I/Os at logic low
    y
    =
    Number of I/Os at logic high
    r1
    =
    Fixed capacitance due to first routed array clock
    r2
    =
    Fixed capacitance due to second routed array
    clock
    s1
    =
    Number of clock loads on the dedicated array
    clock
    CEQM = Equivalent capacitance of logic modules in pF
    CEQI
    =
    Equivalent capacitance of input buffers in pF
    CEQO = Equivalent capacitance of output buffers in pF
    CEQCR = Equivalent capacitance of routed array clock in pF
    CEQHV = Variable capacitance of dedicated array clock
    CEQHF = Fixed capacitance of dedicated array clock
    CL
    =
    Output lead capacitance in pF
    fm
    =
    Average logic module switching rate in MHz
    fn
    =
    Average input buffer switching rate in MHz
    fp
    =
    Average output buffer switching rate in MHz
    fq1
    =
    Average first routed array clock rate in MHz
    fq2
    =
    Average second routed array clock rate in MHz
    fs1
    =
    Average dedicated array clock rate in MHz
    Table 1-12 Standby Power
    ICC
    VCC
    Power
    4 mA
    3.6 V
    14.4 mW
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    A54SX08-2FG144I 功能描述:IC FPGA SX 12K GATES 144-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:SX 標(biāo)準(zhǔn)包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計(jì):- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA(27X27)
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