- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375141 > A43P26161G-95F (AMIC Technology Corporation) 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號： | A43P26161G-95F |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| 中文描述： | 100萬× 16位× 4個銀行的低功耗同步DRAM |
| 文件頁數(shù)： | 4/44頁 |
| 文件大?。?/td> | 1122K |
| 代理商： | A43P26161G-95F |
第1頁第2頁第3頁當前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
A43P26161
PRELIMINARY
(July, 2005, Version 1.1)
3
AMIC Technology, Corp.
Pin Descriptions
Symbol
Name
Description
CLK
System Clock
Active on the positive going edge to sample all inputs.
CS
Chip Select
Disables or Enables device operation by masking or enabling all inputs except
CLK, CKE and L(U)DQM
CKE
Clock Enable
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one clock + tss prior to new command.
Disable input buffers for power down in standby.
A0~A11
Address
Row / Column addresses are multiplexed on the same pins.
Row address : RA0~RA11, Column address: CA0~CA7
BS0, BS1
Bank Select Address
Selects bank to be activated during row address latch time.
Selects band for read/write during column address latch time.
RAS
Row Address Strobe
Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.
CAS
Column Address
Strobe
Latches column addresses on the positive going edge of the CLK with
CAS
low.
Enables column access.
WE
Write Enable
Enables write operation and Row precharge.
L(U)DQM
Data Input/Output
Mask
Makes data output Hi-Z, t SHZ after the clock and masks the output.
Blocks data input when L(U)DQM active.
DQ
0-15
Data Input/Output
Data inputs/outputs are multiplexed on the same pins.
VDD/VSS
Power
Supply/Ground
Power Supply: +2.3V ~ 2.7V/Ground
VDDQ/VSSQ
Data Output
Power/Ground
Provide isolated Power/Ground to DQs for improved noise immunity.
NC/RFU
No Connection
相關PDF資料 |
PDF描述 |
|---|---|
| A43P26161G-95U | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-95UF | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V-75 | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V-75F | 1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| A43P26161G-95U | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161G-95UF | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V-75 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
| A43P26161V-75F | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:1M X 16 Bit X 4 Banks Low Power Synchronous DRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。