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參數(shù)資料
| 型號： | A42MX16-1VQG100I |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 45/142頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA MX SGL CHIP 24K 100-VQFP |
| 標準包裝： | 90 |
| 系列： | MX |
| 輸入/輸出數(shù)： | 83 |
| 門數(shù)： | 24000 |
| 電源電壓： | 3 V ~ 3.6 V，4.5 V ~ 5.5 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-VQFP（14x14） |
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Re vi s i on 11
3-1
3 – Datasheet Information
List of Changes
The following table lists critical changes that were made in the current version of the document.
Revision
Changes
Page
Revision 11
(May 2012)
The FuseLock logo and accompanying text was removed from the "User Security"
The "Development Tool Support" section was updated (SAR 38512).
Revision 10
(April 2012)
"Ordering Information" was updated to include lead-free package ordering codes
(SAR 21968).
The "User Security" section was revised to clarify that although no existing security
measures can give an absolute guarantee, Microsemi FPGAs implement the best
security available in the industry (SAR 34673).
The "Transient Current" section is new (SAR 36930).
Package names were revised according to standards established in Package
Mechanical Drawings (SAR 34774).
Revision 9
(v6.1, April 2009)
In Table 1-14 Absolute Maximum Ratings*, the limits in VI were changed from -0.5 to
VCCI + 0.5 to -0.5 to VCCA + 0.5.
to 2.4 for the min in industrial and military. VIH had VCCI and that was changed to
VCCA.
v6.0
(January 2004)
The "Ease of Integration" section was updated.
The "Temperature Grade Offerings" section is new.
The "Speed Grade Offerings" section is new.
The "General Description" section was updated.
The "MultiPlex I/O Modules" section was updated.
The "User Security" section was updated.
Table 1-1 Voltage Support of MX Devices was updated.
The "Power Dissipation" section was updated.
The "Static Power Component" section was updated.
The "Equivalent Capacitance" section was updated.
Figure 1-12 Silicon Explorer II Setup with 42MX was updated.
Table 1-4 Supported BST Public Instructions was updated.
Figure 1-13 42MX IEEE 1149.1 Boundary Scan Circuitry was updated.
The "Development Tool Support" section was updated.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AMM28DRUN | CONN EDGECARD 56POS .156 DIP SLD |
| A42MX16-1VQ100I | IC FPGA MX SGL CHIP 24K 100-VQFP |
| DA115339-21 | DSUB DA SNAP UNIVE PLASTIC B/S |
| AMM28DRUH | CONN EDGECARD 56POS .156 DIP SLD |
| A54SX32A-FGG256I | IC FPGA SX 48K GATES 256-FBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-1VQG100M | 制造商:Microsemi Corporation 功能描述:FPGA 24K GATES 608 CELLS 119MHZ/198MHZ 0.45UM 3.3V/5V 100VQF - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 83 I/O 100VQFP |
| A42MX16-2BG100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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