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參數(shù)資料
| 型號： | A420616V-50 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE |
| 中文描述： | 100萬× 16的CMOS動態(tài)RAM與江戶頁面模式 |
| 文件頁數(shù)： | 5/25頁 |
| 文件大?。?/td> | 272K |
| 代理商： | A420616V-50 |
A420616 Series
PRELIMINARY
(June, 2002, Version 0.2)
4
AMIC Technology, Inc.
Truth Table
Function
RAS
UCAS
LCAS
H
L
H
WE
OE
Address
I/Os
Notes
Standby
Read: Word
Read: Lower Byte
H
L
L
H
L
L
X
H
H
X
L
L
X
High-Z
Data Out
I/O
0-7
= Data Out
I/O
8-15
= High-Z
Row/Col.
Row/Col.
Read: Upper Byte
L
L
H
H
L
Row/Col.
I/O
0-7
= High-Z
I/O
8-15
= Data Out
Write: Word
Write: Lower Byte
L
L
L
H
L
L
L
L
H
H
Row/Col.
Row/Col.
Data In
I/O
0-7
= Data In
I/O
8-15
= X
Write: Upper Byte
L
L
H
L
H
Row/Col.
I/O
0-7
= X
I/O
8-15
= Data In
Read-Write
EDO-Page-Mode Read: Hi-Z
-First cycle
-Subsequent Cycles
L
L
L
L
L
H
→
L
H
H
L
→
H
H
→
L
H
→
L
H
H
Row/Col.
Row/Col.
Col.
Data Out
→
Data In
Data Out
Data Out
1,2
2
2
H
→
L
H
→
L
H
→
L
H
→
L
H
→
L
H
→
L
L
L
H
H
→
L
H
→
L
H
→
L
H
→
L
H
→
L
H
→
L
L
L
H
EDO-Page-Mode Write
-First cycle
-Subsequent Cycles
L
L
L
L
Row/Col.
Col.
Data In
Data In
1
1
EDO-Page-Mode Read-Write
-First cycle
-Subsequent Cycles
L
L
H
→
L
H
→
L
H
L
X
L
→
H
L
→
H
L
X
X
Row/Col.
Col.
Data Out
→
Data In
Data Out
→
Data In
Data Out
Data In
→
High-Z
High-Z
1, 2
1, 2
Hidden Refresh Read
Hidden Refresh Write
L
→
H
→
L
L
→
H
→
L
L
Row/Col.
Row/Col.
Row
2
1
RAS-Only Refresh
CBR Refresh
Self Refresh
1. Byte Write may be executed with either
UCAS
or
LCAS
active.
2. Byte Read may be executed with either
UCAS
or
LCAS
active.
3. Only one
CAS
signal (
UCAS
or
LCAS
) must be active.
H
→
L
H
→
L
L
L
L
L
X
H
X
X
X
X
High-Z
High-Z
3
Note:
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